intel/fs: Add and use a new load_simd_width_intel intrinsic
authorCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tue, 28 Apr 2020 20:09:27 +0000 (13:09 -0700)
committerCaio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Fri, 1 May 2020 19:50:37 +0000 (12:50 -0700)
commit2663759af0edb1ebcee3aa1ff63f846911d16076
treedcf59ff822066ed4dd969211f989e62c72a761c1
parent4b000b491a49afb12612a3cfeebeca9a528cd5e3
intel/fs: Add and use a new load_simd_width_intel intrinsic

Intrinsic to get the SIMD width, which not always the same as subgroup
size.  Starting with a small scope (Intel), but we can rename it later
to generalize if this turns out useful for other drivers.

Change brw_nir_lower_cs_intrinsics() to use this intrinsic instead of
a width will be passed as argument.  The pass also used to optimized
load_subgroup_id for the case that the workgroup fitted into a single
thread (it will be constant zero).  This optimization moved together
with lowering of the SIMD.

This is a preparation for letting the drivers call it before the
brw_compile_cs() step.

No shader-db changes in BDW, SKL, ICL and TGL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4794>
src/compiler/nir/nir_intrinsics.py
src/intel/compiler/brw_fs.cpp
src/intel/compiler/brw_fs_nir.cpp
src/intel/compiler/brw_nir.h
src/intel/compiler/brw_nir_lower_cs_intrinsics.c