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(parent: 779f3ee) | patch
back.pysim: override ResetSynchronizer implementation.
authorwhitequark <whitequark@whitequark.org>
Fri, 28 Jun 2019 07:49:14 +0000 (07:49 +0000)
committerwhitequark <whitequark@whitequark.org>
Fri, 28 Jun 2019 07:49:14 +0000 (07:49 +0000)
commit300d47ca2ebbabb31d2f191acf80c9b89659c4f0
treed420da467b029164f71703d96daeca24160c7c45tree
parent779f3ee906190b92e5a07e5adcd62b20213bb936commit | diff
back.pysim: override ResetSynchronizer implementation.

This was rewritten to use Yosys cells in 779f3ee9 to avoid leaking
the interior clock domain, but the simulator doesn't understand Yosys
cells. So, use the old implementation in the simulator.
nmigen/back/pysim.py diff | blob | history