i965/vec4: Add register classes up to MAX_VGRF_SIZE.
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 3 Feb 2015 18:34:39 +0000 (20:34 +0200)
committerFrancisco Jerez <currojerez@riseup.net>
Tue, 10 Feb 2015 17:09:25 +0000 (19:09 +0200)
commit78e9043475d4bed8b50f7e413963c960fa0935bb
tree63645cb2441c8713580d5eb2eabf449c698a4248
parent530445330b403d835a4027b41388b5eea8c2e1ab
i965/vec4: Add register classes up to MAX_VGRF_SIZE.

In preparation for some send from GRF instructions that will require
larger payloads.

Reviewed-by: Matt Turner <mattst88@gmail.com>
src/mesa/drivers/dri/i965/brw_fs.h
src/mesa/drivers/dri/i965/brw_shader.h
src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp