i965: Allocate URB space for HS and DS stages when required.
authorChris Forbes <chrisf@ijw.co.nz>
Tue, 9 Sep 2014 09:30:48 +0000 (21:30 +1200)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 15 Dec 2015 10:16:14 +0000 (02:16 -0800)
commitaf5ca43f2676bff7499f93277f908b681cb821d0
treed5dd7a50cf2fa8684ca0baf9d9ea530519a9997d
parent8c0963f9d36a8249ec18c493bad9ec33e665a616
i965: Allocate URB space for HS and DS stages when required.

v2: (by Ken, incorporating feedback from Matt Turner):
- Rewrite the push constant allocation code to be clearer.
- Only apply the minimum VS entries workaround on Gen 8.

v3: (by Ken)
- Fix a bug in v2 where we failed to allocate the full push constant
  space when the number of enabled stages didn't divide the available
  push constant space evenly.  (Any left over space is now allocated
  to the PS, as it was in v1.)
- Fix an off-by-one error in v2's number of enabled stages calculation.
- Use DIV_ROUND_UP for nicer formatting.
- Line wrapping fixes.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
src/mesa/drivers/dri/i965/brw_context.h
src/mesa/drivers/dri/i965/gen7_blorp.cpp
src/mesa/drivers/dri/i965/gen7_urb.c