1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
66 /* If this is nonzero, we do not bother generating VOLATILE
67 around volatile memory references, and we are willing to
68 output indirect addresses. If cse is to follow, we reject
69 indirect addresses so a useful potential cse is generated;
70 if it is used only once, instruction combination will produce
71 the same indirect address eventually. */
74 static bool block_move_libcall_safe_for_call_parm (void);
75 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
76 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
77 unsigned HOST_WIDE_INT);
78 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
79 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
80 static rtx_insn *compress_float_constant (rtx, rtx);
81 static rtx get_subtarget (rtx);
82 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
83 HOST_WIDE_INT, unsigned HOST_WIDE_INT,
84 unsigned HOST_WIDE_INT, machine_mode,
85 tree, int, alias_set_type, bool);
86 static void store_constructor (tree, rtx, int, HOST_WIDE_INT, bool);
87 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
88 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
89 machine_mode, tree, alias_set_type, bool, bool);
91 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
93 static int is_aligning_offset (const_tree, const_tree);
94 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
95 static rtx do_store_flag (sepops, rtx, machine_mode);
97 static void emit_single_push_insn (machine_mode, rtx, tree);
99 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
100 profile_probability);
101 static rtx const_vector_from_tree (tree);
102 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree);
103 static tree tree_expr_size (const_tree);
104 static HOST_WIDE_INT int_expr_size (tree);
105 static void convert_mode_scalar (rtx, rtx, int);
108 /* This is run to set up which modes can be used
109 directly in memory and to initialize the block move optab. It is run
110 at the beginning of compilation and when the target is reinitialized. */
113 init_expr_target (void)
120 /* Try indexing by frame ptr and try by stack ptr.
121 It is known that on the Convex the stack ptr isn't a valid index.
122 With luck, one or the other is valid on any machine. */
123 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
124 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
126 /* A scratch register we can modify in-place below to avoid
127 useless RTL allocations. */
128 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
130 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
131 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
132 PATTERN (insn) = pat;
134 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
135 mode = (machine_mode) ((int) mode + 1))
139 direct_load[(int) mode] = direct_store[(int) mode] = 0;
140 PUT_MODE (mem, mode);
141 PUT_MODE (mem1, mode);
143 /* See if there is some register that can be used in this mode and
144 directly loaded or stored from memory. */
146 if (mode != VOIDmode && mode != BLKmode)
147 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
148 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
151 if (!targetm.hard_regno_mode_ok (regno, mode))
154 set_mode_and_regno (reg, mode, regno);
157 SET_DEST (pat) = reg;
158 if (recog (pat, insn, &num_clobbers) >= 0)
159 direct_load[(int) mode] = 1;
161 SET_SRC (pat) = mem1;
162 SET_DEST (pat) = reg;
163 if (recog (pat, insn, &num_clobbers) >= 0)
164 direct_load[(int) mode] = 1;
167 SET_DEST (pat) = mem;
168 if (recog (pat, insn, &num_clobbers) >= 0)
169 direct_store[(int) mode] = 1;
172 SET_DEST (pat) = mem1;
173 if (recog (pat, insn, &num_clobbers) >= 0)
174 direct_store[(int) mode] = 1;
178 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
180 opt_scalar_float_mode mode_iter;
181 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
183 scalar_float_mode mode = mode_iter.require ();
184 scalar_float_mode srcmode;
185 FOR_EACH_MODE_UNTIL (srcmode, mode)
189 ic = can_extend_p (mode, srcmode, 0);
190 if (ic == CODE_FOR_nothing)
193 PUT_MODE (mem, srcmode);
195 if (insn_operand_matches (ic, 1, mem))
196 float_extend_from_mem[mode][srcmode] = true;
201 /* This is run at the start of compiling a function. */
206 memset (&crtl->expr, 0, sizeof (crtl->expr));
209 /* Copy data from FROM to TO, where the machine modes are not the same.
210 Both modes may be integer, or both may be floating, or both may be
212 UNSIGNEDP should be nonzero if FROM is an unsigned type.
213 This causes zero-extension instead of sign-extension. */
216 convert_move (rtx to, rtx from, int unsignedp)
218 machine_mode to_mode = GET_MODE (to);
219 machine_mode from_mode = GET_MODE (from);
221 gcc_assert (to_mode != BLKmode);
222 gcc_assert (from_mode != BLKmode);
224 /* If the source and destination are already the same, then there's
229 /* If FROM is a SUBREG that indicates that we have already done at least
230 the required extension, strip it. We don't handle such SUBREGs as
233 scalar_int_mode to_int_mode;
234 if (GET_CODE (from) == SUBREG
235 && SUBREG_PROMOTED_VAR_P (from)
236 && is_a <scalar_int_mode> (to_mode, &to_int_mode)
237 && (GET_MODE_PRECISION (subreg_promoted_mode (from))
238 >= GET_MODE_PRECISION (to_int_mode))
239 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
240 from = gen_lowpart (to_int_mode, from), from_mode = to_int_mode;
242 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
244 if (to_mode == from_mode
245 || (from_mode == VOIDmode && CONSTANT_P (from)))
247 emit_move_insn (to, from);
251 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
253 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
255 if (VECTOR_MODE_P (to_mode))
256 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
258 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
260 emit_move_insn (to, from);
264 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
266 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
267 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
271 convert_mode_scalar (to, from, unsignedp);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to, rtx from, int unsignedp)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from));
281 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to));
282 bool to_real = SCALAR_FLOAT_MODE_P (to_mode);
283 bool from_real = SCALAR_FLOAT_MODE_P (from_mode);
287 gcc_assert (to_real == from_real);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
291 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
299 gcc_assert ((GET_MODE_PRECISION (from_mode)
300 != GET_MODE_PRECISION (to_mode))
301 || (DECIMAL_FLOAT_MODE_P (from_mode)
302 != DECIMAL_FLOAT_MODE_P (to_mode)));
304 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
305 /* Conversion between decimal float and binary float, same size. */
306 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
307 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
312 /* Try converting directly if the insn is supported. */
314 code = convert_optab_handler (tab, to_mode, from_mode);
315 if (code != CODE_FOR_nothing)
317 emit_unop_insn (code, to, from,
318 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
322 /* Otherwise use a libcall. */
323 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall);
329 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
331 insns = get_insns ();
333 emit_libcall_block (insns, to, value,
334 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
336 : gen_rtx_FLOAT_EXTEND (to_mode, from));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
352 if (convert_optab_handler (ctab, to_mode, from_mode)
355 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
368 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
369 != CODE_FOR_nothing);
371 if (full_mode != from_mode)
372 from = convert_to_mode (full_mode, from, unsignedp);
373 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
377 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
382 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
383 enum insn_code icode;
385 icode = convert_optab_handler (ctab, full_mode, from_mode);
386 gcc_assert (icode != CODE_FOR_nothing);
388 if (to_mode == full_mode)
390 emit_unop_insn (icode, to, from, UNKNOWN);
394 new_from = gen_reg_rtx (full_mode);
395 emit_unop_insn (icode, new_from, from, UNKNOWN);
397 /* else proceed to integer conversions below. */
398 from_mode = full_mode;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
411 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
412 expand_fixed_convert (to, from, 0, 0);
414 expand_fixed_convert (to, from, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
422 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
429 scalar_mode lowpart_mode;
430 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
432 /* Try converting directly if the insn is supported. */
433 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize > 0 && GET_CODE (from) == SUBREG)
441 from = force_reg (from_mode, from);
442 emit_unop_insn (code, to, from, equiv_code);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
447 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
448 != CODE_FOR_nothing))
450 rtx word_to = gen_reg_rtx (word_mode);
453 if (reg_overlap_mentioned_p (to, from))
454 from = force_reg (from_mode, from);
457 convert_move (word_to, from, unsignedp);
458 emit_unop_insn (code, to, word_to, equiv_code);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
472 from = force_reg (from_mode, from);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
476 lowpart_mode = word_mode;
478 lowpart_mode = from_mode;
480 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
482 lowpart = gen_lowpart (lowpart_mode, to);
483 emit_move_insn (lowpart, lowfrom);
485 /* Compute the value to put in each remaining word. */
487 fill_value = const0_rtx;
489 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
490 LT, lowfrom, const0_rtx,
491 lowpart_mode, 0, -1);
493 /* Fill the remaining words. */
494 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
496 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
497 rtx subword = operand_subword (to, index, 1, to_mode);
499 gcc_assert (subword);
501 if (fill_value != subword)
502 emit_move_insn (subword, fill_value);
505 insns = get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
517 && ! MEM_VOLATILE_P (from)
518 && direct_load[(int) to_mode]
519 && ! mode_dependent_address_p (XEXP (from, 0),
520 MEM_ADDR_SPACE (from)))
522 || GET_CODE (from) == SUBREG))
523 from = force_reg (from_mode, from);
524 convert_move (to, gen_lowpart (word_mode, from), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
536 && ! MEM_VOLATILE_P (from)
537 && direct_load[(int) to_mode]
538 && ! mode_dependent_address_p (XEXP (from, 0),
539 MEM_ADDR_SPACE (from)))
541 || GET_CODE (from) == SUBREG))
542 from = force_reg (from_mode, from);
543 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
544 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode))
545 from = copy_to_reg (from);
546 emit_move_insn (to, gen_lowpart (to_mode, from));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
553 /* Convert directly if that works. */
554 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
557 emit_unop_insn (code, to, from, equiv_code);
562 scalar_mode intermediate;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter;
568 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)
570 scalar_mode intermediate = intermediate_iter.require ();
571 if (((can_extend_p (to_mode, intermediate, unsignedp)
573 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,
576 && (can_extend_p (intermediate, from_mode, unsignedp)
577 != CODE_FOR_nothing))
579 convert_move (to, convert_to_mode (intermediate, from,
580 unsignedp), unsignedp);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount = (GET_MODE_PRECISION (to_mode)
588 - GET_MODE_PRECISION (from_mode));
589 from = gen_lowpart (to_mode, force_reg (from_mode, from));
590 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
592 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
595 emit_move_insn (to, tmp);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab, to_mode,
602 from_mode) != CODE_FOR_nothing)
604 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
618 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
619 emit_move_insn (to, temp);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
637 return convert_modes (mode, VOIDmode, x, unsignedp);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
654 scalar_int_mode int_mode;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x)
661 && is_a <scalar_int_mode> (mode, &int_mode)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x))
663 >= GET_MODE_PRECISION (int_mode))
664 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
665 x = gen_lowpart (int_mode, SUBREG_REG (x));
667 if (GET_MODE (x) != VOIDmode)
668 oldmode = GET_MODE (x);
673 if (CONST_SCALAR_INT_P (x)
674 && is_int_mode (mode, &int_mode))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode) != MODE_INT)
680 oldmode = MAX_MODE_INT;
681 wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
682 GET_MODE_PRECISION (int_mode),
683 unsignedp ? UNSIGNED : SIGNED);
684 return immed_wide_int_const (w, int_mode);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode;
691 if (is_int_mode (mode, &int_mode)
692 && is_int_mode (oldmode, &int_oldmode)
693 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
694 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode])
696 && (!HARD_REGISTER_P (x)
697 || targetm.hard_regno_mode_ok (REGNO (x), int_mode))
698 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x)))))
699 return gen_lowpart (int_mode, x);
701 /* Converting from integer constant into mode is always equivalent to an
703 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
705 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
706 return simplify_gen_subreg (mode, x, oldmode, 0);
709 temp = gen_reg_rtx (mode);
710 convert_move (temp, x, unsignedp);
714 /* Return the largest alignment we can use for doing a move (or store)
715 of MAX_PIECES. ALIGN is the largest alignment we could use. */
718 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
720 scalar_int_mode tmode
721 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require ();
723 if (align >= GET_MODE_ALIGNMENT (tmode))
724 align = GET_MODE_ALIGNMENT (tmode);
727 scalar_int_mode xmode = NARROWEST_INT_MODE;
728 opt_scalar_int_mode mode_iter;
729 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
731 tmode = mode_iter.require ();
732 if (GET_MODE_SIZE (tmode) > max_pieces
733 || targetm.slow_unaligned_access (tmode, align))
738 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
744 /* Return the widest integer mode that is narrower than SIZE bytes. */
746 static scalar_int_mode
747 widest_int_mode_for_size (unsigned int size)
749 scalar_int_mode result = NARROWEST_INT_MODE;
751 gcc_checking_assert (size > 1);
753 opt_scalar_int_mode tmode;
754 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)
755 if (GET_MODE_SIZE (tmode.require ()) < size)
756 result = tmode.require ();
761 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
762 and should be performed piecewise. */
765 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align,
766 enum by_pieces_operation op)
768 return targetm.use_by_pieces_infrastructure_p (len, align, op,
769 optimize_insn_for_speed_p ());
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align)
779 return can_do_by_pieces (len, align, MOVE_BY_PIECES);
782 /* Return number of insns required to perform operation OP by pieces
783 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
785 unsigned HOST_WIDE_INT
786 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
787 unsigned int max_size, by_pieces_operation op)
789 unsigned HOST_WIDE_INT n_insns = 0;
791 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
793 while (max_size > 1 && l > 0)
795 scalar_int_mode mode = widest_int_mode_for_size (max_size);
796 enum insn_code icode;
798 unsigned int modesize = GET_MODE_SIZE (mode);
800 icode = optab_handler (mov_optab, mode);
801 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
803 unsigned HOST_WIDE_INT n_pieces = l / modesize;
811 case COMPARE_BY_PIECES:
812 int batch = targetm.compare_by_pieces_branch_ratio (mode);
813 int batch_ops = 4 * batch - 1;
814 unsigned HOST_WIDE_INT full = n_pieces / batch;
815 n_insns += full * batch_ops;
816 if (n_pieces % batch != 0)
829 /* Used when performing piecewise block operations, holds information
830 about one of the memory objects involved. The member functions
831 can be used to generate code for loading from the object and
832 updating the address when iterating. */
836 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
839 /* The address of the object. Can differ from that seen in the
840 MEM rtx if we copied the address to a register. */
842 /* Nonzero if the address on the object has an autoincrement already,
843 signifies whether that was an increment or decrement. */
844 signed char m_addr_inc;
845 /* Nonzero if we intend to use autoinc without the address already
846 having autoinc form. We will insert add insns around each memory
847 reference, expecting later passes to form autoinc addressing modes.
848 The only supported options are predecrement and postincrement. */
849 signed char m_explicit_inc;
850 /* True if we have either of the two possible cases of using
853 /* True if this is an address to be used for load operations rather
857 /* Optionally, a function to obtain constants for any given offset into
858 the objects, and data associated with it. */
859 by_pieces_constfn m_constfn;
862 pieces_addr (rtx, bool, by_pieces_constfn, void *);
863 rtx adjust (scalar_int_mode, HOST_WIDE_INT);
864 void increment_address (HOST_WIDE_INT);
865 void maybe_predec (HOST_WIDE_INT);
866 void maybe_postinc (HOST_WIDE_INT);
867 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT);
874 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
875 true if the operation to be performed on this object is a load
876 rather than a store. For stores, OBJ can be NULL, in which case we
877 assume the operation is a stack push. For loads, the optional
878 CONSTFN and its associated CFNDATA can be used in place of the
881 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
883 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
889 rtx addr = XEXP (obj, 0);
890 rtx_code code = GET_CODE (addr);
892 bool dec = code == PRE_DEC || code == POST_DEC;
893 bool inc = code == PRE_INC || code == POST_INC;
896 m_addr_inc = dec ? -1 : 1;
898 /* While we have always looked for these codes here, the code
899 implementing the memory operation has never handled them.
900 Support could be added later if necessary or beneficial. */
901 gcc_assert (code != PRE_INC && code != POST_DEC);
909 if (STACK_GROWS_DOWNWARD)
915 gcc_assert (constfn != NULL);
919 gcc_assert (is_load);
922 /* Decide whether to use autoinc for an address involved in a memory op.
923 MODE is the mode of the accesses, REVERSE is true if we've decided to
924 perform the operation starting from the end, and LEN is the length of
925 the operation. Don't override an earlier decision to set m_auto. */
928 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse,
931 if (m_auto || m_obj == NULL_RTX)
934 bool use_predec = (m_is_load
935 ? USE_LOAD_PRE_DECREMENT (mode)
936 : USE_STORE_PRE_DECREMENT (mode));
937 bool use_postinc = (m_is_load
938 ? USE_LOAD_POST_INCREMENT (mode)
939 : USE_STORE_POST_INCREMENT (mode));
940 machine_mode addr_mode = get_address_mode (m_obj);
942 if (use_predec && reverse)
944 m_addr = copy_to_mode_reg (addr_mode,
945 plus_constant (addr_mode,
950 else if (use_postinc && !reverse)
952 m_addr = copy_to_mode_reg (addr_mode, m_addr);
956 else if (CONSTANT_P (m_addr))
957 m_addr = copy_to_mode_reg (addr_mode, m_addr);
960 /* Adjust the address to refer to the data at OFFSET in MODE. If we
961 are using autoincrement for this address, we don't add the offset,
962 but we still modify the MEM's properties. */
965 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset)
968 return m_constfn (m_cfndata, offset, mode);
969 if (m_obj == NULL_RTX)
972 return adjust_automodify_address (m_obj, mode, m_addr, offset);
974 return adjust_address (m_obj, mode, offset);
977 /* Emit an add instruction to increment the address by SIZE. */
980 pieces_addr::increment_address (HOST_WIDE_INT size)
982 rtx amount = gen_int_mode (size, GET_MODE (m_addr));
983 emit_insn (gen_add2_insn (m_addr, amount));
986 /* If we are supposed to decrement the address after each access, emit code
987 to do so now. Increment by SIZE (which has should have the correct sign
991 pieces_addr::maybe_predec (HOST_WIDE_INT size)
993 if (m_explicit_inc >= 0)
995 gcc_assert (HAVE_PRE_DECREMENT);
996 increment_address (size);
999 /* If we are supposed to decrement the address after each access, emit code
1000 to do so now. Increment by SIZE. */
1003 pieces_addr::maybe_postinc (HOST_WIDE_INT size)
1005 if (m_explicit_inc <= 0)
1007 gcc_assert (HAVE_POST_INCREMENT);
1008 increment_address (size);
1011 /* This structure is used by do_op_by_pieces to describe the operation
1014 class op_by_pieces_d
1017 pieces_addr m_to, m_from;
1018 unsigned HOST_WIDE_INT m_len;
1019 HOST_WIDE_INT m_offset;
1020 unsigned int m_align;
1021 unsigned int m_max_size;
1024 /* Virtual functions, overriden by derived classes for the specific
1026 virtual void generate (rtx, rtx, machine_mode) = 0;
1027 virtual bool prepare_mode (machine_mode, unsigned int) = 0;
1028 virtual void finish_mode (machine_mode)
1033 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *,
1034 unsigned HOST_WIDE_INT, unsigned int);
1038 /* The constructor for an op_by_pieces_d structure. We require two
1039 objects named TO and FROM, which are identified as loads or stores
1040 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1041 and its associated FROM_CFN_DATA can be used to replace loads with
1042 constant values. LEN describes the length of the operation. */
1044 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
1045 rtx from, bool from_load,
1046 by_pieces_constfn from_cfn,
1047 void *from_cfn_data,
1048 unsigned HOST_WIDE_INT len,
1050 : m_to (to, to_load, NULL, NULL),
1051 m_from (from, from_load, from_cfn, from_cfn_data),
1052 m_len (len), m_max_size (MOVE_MAX_PIECES + 1)
1054 int toi = m_to.get_addr_inc ();
1055 int fromi = m_from.get_addr_inc ();
1056 if (toi >= 0 && fromi >= 0)
1058 else if (toi <= 0 && fromi <= 0)
1063 m_offset = m_reverse ? len : 0;
1064 align = MIN (to ? MEM_ALIGN (to) : align,
1065 from ? MEM_ALIGN (from) : align);
1067 /* If copying requires more than two move insns,
1068 copy addresses to registers (to make displacements shorter)
1069 and use post-increment if available. */
1070 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
1072 /* Find the mode of the largest comparison. */
1073 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1075 m_from.decide_autoinc (mode, m_reverse, len);
1076 m_to.decide_autoinc (mode, m_reverse, len);
1079 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1083 /* This function contains the main loop used for expanding a block
1084 operation. First move what we can in the largest integer mode,
1085 then go to successively smaller modes. For every access, call
1086 GENFUN with the two operands and the EXTRA_DATA. */
1089 op_by_pieces_d::run ()
1091 while (m_max_size > 1 && m_len > 0)
1093 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1095 if (prepare_mode (mode, m_align))
1097 unsigned int size = GET_MODE_SIZE (mode);
1098 rtx to1 = NULL_RTX, from1;
1100 while (m_len >= size)
1105 to1 = m_to.adjust (mode, m_offset);
1106 from1 = m_from.adjust (mode, m_offset);
1108 m_to.maybe_predec (-(HOST_WIDE_INT)size);
1109 m_from.maybe_predec (-(HOST_WIDE_INT)size);
1111 generate (to1, from1, mode);
1113 m_to.maybe_postinc (size);
1114 m_from.maybe_postinc (size);
1125 m_max_size = GET_MODE_SIZE (mode);
1128 /* The code above should have handled everything. */
1129 gcc_assert (!m_len);
1132 /* Derived class from op_by_pieces_d, providing support for block move
1135 class move_by_pieces_d : public op_by_pieces_d
1137 insn_gen_fn m_gen_fun;
1138 void generate (rtx, rtx, machine_mode);
1139 bool prepare_mode (machine_mode, unsigned int);
1142 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1144 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align)
1147 rtx finish_endp (int);
1150 /* Return true if MODE can be used for a set of copies, given an
1151 alignment ALIGN. Prepare whatever data is necessary for later
1152 calls to generate. */
1155 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1157 insn_code icode = optab_handler (mov_optab, mode);
1158 m_gen_fun = GEN_FCN (icode);
1159 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1162 /* A callback used when iterating for a compare_by_pieces_operation.
1163 OP0 and OP1 are the values that have been loaded and should be
1164 compared in MODE. If OP0 is NULL, this means we should generate a
1165 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1166 gen function that should be used to generate the mode. */
1169 move_by_pieces_d::generate (rtx op0, rtx op1,
1170 machine_mode mode ATTRIBUTE_UNUSED)
1172 #ifdef PUSH_ROUNDING
1173 if (op0 == NULL_RTX)
1175 emit_single_push_insn (mode, op1, NULL);
1179 emit_insn (m_gen_fun (op0, op1));
1182 /* Perform the final adjustment at the end of a string to obtain the
1183 correct return value for the block operation. If ENDP is 1 return
1184 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1185 end minus one byte ala stpcpy. */
1188 move_by_pieces_d::finish_endp (int endp)
1190 gcc_assert (!m_reverse);
1193 m_to.maybe_postinc (-1);
1196 return m_to.adjust (QImode, m_offset);
1199 /* Generate several move instructions to copy LEN bytes from block FROM to
1200 block TO. (These are MEM rtx's with BLKmode).
1202 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1203 used to push FROM to the stack.
1205 ALIGN is maximum stack alignment we can assume.
1207 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1208 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1212 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1213 unsigned int align, int endp)
1215 #ifndef PUSH_ROUNDING
1220 move_by_pieces_d data (to, from, len, align);
1225 return data.finish_endp (endp);
1230 /* Derived class from op_by_pieces_d, providing support for block move
1233 class store_by_pieces_d : public op_by_pieces_d
1235 insn_gen_fn m_gen_fun;
1236 void generate (rtx, rtx, machine_mode);
1237 bool prepare_mode (machine_mode, unsigned int);
1240 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
1241 unsigned HOST_WIDE_INT len, unsigned int align)
1242 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align)
1245 rtx finish_endp (int);
1248 /* Return true if MODE can be used for a set of stores, given an
1249 alignment ALIGN. Prepare whatever data is necessary for later
1250 calls to generate. */
1253 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1255 insn_code icode = optab_handler (mov_optab, mode);
1256 m_gen_fun = GEN_FCN (icode);
1257 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1260 /* A callback used when iterating for a store_by_pieces_operation.
1261 OP0 and OP1 are the values that have been loaded and should be
1262 compared in MODE. If OP0 is NULL, this means we should generate a
1263 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1264 gen function that should be used to generate the mode. */
1267 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1269 emit_insn (m_gen_fun (op0, op1));
1272 /* Perform the final adjustment at the end of a string to obtain the
1273 correct return value for the block operation. If ENDP is 1 return
1274 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1275 end minus one byte ala stpcpy. */
1278 store_by_pieces_d::finish_endp (int endp)
1280 gcc_assert (!m_reverse);
1283 m_to.maybe_postinc (-1);
1286 return m_to.adjust (QImode, m_offset);
1289 /* Determine whether the LEN bytes generated by CONSTFUN can be
1290 stored to memory using several move instructions. CONSTFUNDATA is
1291 a pointer which will be passed as argument in every CONSTFUN call.
1292 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1293 a memset operation and false if it's a copy of a constant string.
1294 Return nonzero if a call to store_by_pieces should succeed. */
1297 can_store_by_pieces (unsigned HOST_WIDE_INT len,
1298 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1299 void *constfundata, unsigned int align, bool memsetp)
1301 unsigned HOST_WIDE_INT l;
1302 unsigned int max_size;
1303 HOST_WIDE_INT offset = 0;
1304 enum insn_code icode;
1306 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1307 rtx cst ATTRIBUTE_UNUSED;
1312 if (!targetm.use_by_pieces_infrastructure_p (len, align,
1316 optimize_insn_for_speed_p ()))
1319 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
1321 /* We would first store what we can in the largest integer mode, then go to
1322 successively smaller modes. */
1325 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
1329 max_size = STORE_MAX_PIECES + 1;
1330 while (max_size > 1 && l > 0)
1332 scalar_int_mode mode = widest_int_mode_for_size (max_size);
1334 icode = optab_handler (mov_optab, mode);
1335 if (icode != CODE_FOR_nothing
1336 && align >= GET_MODE_ALIGNMENT (mode))
1338 unsigned int size = GET_MODE_SIZE (mode);
1345 cst = (*constfun) (constfundata, offset, mode);
1346 if (!targetm.legitimate_constant_p (mode, cst))
1356 max_size = GET_MODE_SIZE (mode);
1359 /* The code above should have handled everything. */
1366 /* Generate several move instructions to store LEN bytes generated by
1367 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1368 pointer which will be passed as argument in every CONSTFUN call.
1369 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1370 a memset operation and false if it's a copy of a constant string.
1371 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1372 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1376 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
1377 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1378 void *constfundata, unsigned int align, bool memsetp, int endp)
1382 gcc_assert (endp != 2);
1386 gcc_assert (targetm.use_by_pieces_infrastructure_p
1388 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,
1389 optimize_insn_for_speed_p ()));
1391 store_by_pieces_d data (to, constfun, constfundata, len, align);
1395 return data.finish_endp (endp);
1400 /* Callback routine for clear_by_pieces.
1401 Return const0_rtx unconditionally. */
1404 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode)
1409 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1410 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1413 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
1418 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align);
1422 /* Context used by compare_by_pieces_genfn. It stores the fail label
1423 to jump to in case of miscomparison, and for branch ratios greater than 1,
1424 it stores an accumulator and the current and maximum counts before
1425 emitting another branch. */
1427 class compare_by_pieces_d : public op_by_pieces_d
1429 rtx_code_label *m_fail_label;
1431 int m_count, m_batch;
1433 void generate (rtx, rtx, machine_mode);
1434 bool prepare_mode (machine_mode, unsigned int);
1435 void finish_mode (machine_mode);
1437 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
1438 void *op1_cfn_data, HOST_WIDE_INT len, int align,
1439 rtx_code_label *fail_label)
1440 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align)
1442 m_fail_label = fail_label;
1446 /* A callback used when iterating for a compare_by_pieces_operation.
1447 OP0 and OP1 are the values that have been loaded and should be
1448 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1449 context structure. */
1452 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1456 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX,
1457 true, OPTAB_LIB_WIDEN);
1459 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
1460 true, OPTAB_LIB_WIDEN);
1461 m_accumulator = temp;
1463 if (++m_count < m_batch)
1467 op0 = m_accumulator;
1469 m_accumulator = NULL_RTX;
1471 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL,
1472 m_fail_label, profile_probability::uninitialized ());
1475 /* Return true if MODE can be used for a set of moves and comparisons,
1476 given an alignment ALIGN. Prepare whatever data is necessary for
1477 later calls to generate. */
1480 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1482 insn_code icode = optab_handler (mov_optab, mode);
1483 if (icode == CODE_FOR_nothing
1484 || align < GET_MODE_ALIGNMENT (mode)
1485 || !can_compare_p (EQ, mode, ccp_jump))
1487 m_batch = targetm.compare_by_pieces_branch_ratio (mode);
1490 m_accumulator = NULL_RTX;
1495 /* Called after expanding a series of comparisons in MODE. If we have
1496 accumulated results for which we haven't emitted a branch yet, do
1500 compare_by_pieces_d::finish_mode (machine_mode mode)
1502 if (m_accumulator != NULL_RTX)
1503 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode,
1504 NULL_RTX, NULL, m_fail_label,
1505 profile_probability::uninitialized ());
1508 /* Generate several move instructions to compare LEN bytes from blocks
1509 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1511 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1512 used to push FROM to the stack.
1514 ALIGN is maximum stack alignment we can assume.
1516 Optionally, the caller can pass a constfn and associated data in A1_CFN
1517 and A1_CFN_DATA. describing that the second operand being compared is a
1518 known constant and how to obtain its data. */
1521 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
1522 rtx target, unsigned int align,
1523 by_pieces_constfn a1_cfn, void *a1_cfn_data)
1525 rtx_code_label *fail_label = gen_label_rtx ();
1526 rtx_code_label *end_label = gen_label_rtx ();
1528 if (target == NULL_RTX
1529 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
1530 target = gen_reg_rtx (TYPE_MODE (integer_type_node));
1532 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
1537 emit_move_insn (target, const0_rtx);
1538 emit_jump (end_label);
1540 emit_label (fail_label);
1541 emit_move_insn (target, const1_rtx);
1542 emit_label (end_label);
1547 /* Emit code to move a block Y to a block X. This may be done with
1548 string-move instructions, with multiple scalar move instructions,
1549 or with a library call.
1551 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1552 SIZE is an rtx that says how long they are.
1553 ALIGN is the maximum alignment we can assume they have.
1554 METHOD describes what kind of copy this is, and what mechanisms may be used.
1555 MIN_SIZE is the minimal size of block to move
1556 MAX_SIZE is the maximal size of block to move, if it can not be represented
1557 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1559 Return the address of the new block, if memcpy is called and returns it,
1563 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1564 unsigned int expected_align, HOST_WIDE_INT expected_size,
1565 unsigned HOST_WIDE_INT min_size,
1566 unsigned HOST_WIDE_INT max_size,
1567 unsigned HOST_WIDE_INT probable_max_size)
1574 if (CONST_INT_P (size) && INTVAL (size) == 0)
1579 case BLOCK_OP_NORMAL:
1580 case BLOCK_OP_TAILCALL:
1581 may_use_call = true;
1584 case BLOCK_OP_CALL_PARM:
1585 may_use_call = block_move_libcall_safe_for_call_parm ();
1587 /* Make inhibit_defer_pop nonzero around the library call
1588 to force it to pop the arguments right away. */
1592 case BLOCK_OP_NO_LIBCALL:
1593 may_use_call = false;
1600 gcc_assert (MEM_P (x) && MEM_P (y));
1601 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1602 gcc_assert (align >= BITS_PER_UNIT);
1604 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1605 block copy is more efficient for other large modes, e.g. DCmode. */
1606 x = adjust_address (x, BLKmode, 0);
1607 y = adjust_address (y, BLKmode, 0);
1609 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1610 can be incorrect is coming from __builtin_memcpy. */
1611 if (CONST_INT_P (size))
1613 x = shallow_copy_rtx (x);
1614 y = shallow_copy_rtx (y);
1615 set_mem_size (x, INTVAL (size));
1616 set_mem_size (y, INTVAL (size));
1619 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1620 move_by_pieces (x, y, INTVAL (size), align, 0);
1621 else if (emit_block_move_via_movmem (x, y, size, align,
1622 expected_align, expected_size,
1623 min_size, max_size, probable_max_size))
1625 else if (may_use_call
1626 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1627 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1629 /* Since x and y are passed to a libcall, mark the corresponding
1630 tree EXPR as addressable. */
1631 tree y_expr = MEM_EXPR (y);
1632 tree x_expr = MEM_EXPR (x);
1634 mark_addressable (y_expr);
1636 mark_addressable (x_expr);
1637 retval = emit_block_copy_via_libcall (x, y, size,
1638 method == BLOCK_OP_TAILCALL);
1642 emit_block_move_via_loop (x, y, size, align);
1644 if (method == BLOCK_OP_CALL_PARM)
1651 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1653 unsigned HOST_WIDE_INT max, min = 0;
1654 if (GET_CODE (size) == CONST_INT)
1655 min = max = UINTVAL (size);
1657 max = GET_MODE_MASK (GET_MODE (size));
1658 return emit_block_move_hints (x, y, size, method, 0, -1,
1662 /* A subroutine of emit_block_move. Returns true if calling the
1663 block move libcall will not clobber any parameters which may have
1664 already been placed on the stack. */
1667 block_move_libcall_safe_for_call_parm (void)
1669 #if defined (REG_PARM_STACK_SPACE)
1673 /* If arguments are pushed on the stack, then they're safe. */
1677 /* If registers go on the stack anyway, any argument is sure to clobber
1678 an outgoing argument. */
1679 #if defined (REG_PARM_STACK_SPACE)
1680 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1681 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1682 depend on its argument. */
1684 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1685 && REG_PARM_STACK_SPACE (fn) != 0)
1689 /* If any argument goes in memory, then it might clobber an outgoing
1692 CUMULATIVE_ARGS args_so_far_v;
1693 cumulative_args_t args_so_far;
1696 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1697 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1698 args_so_far = pack_cumulative_args (&args_so_far_v);
1700 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1701 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1703 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1704 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1706 if (!tmp || !REG_P (tmp))
1708 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1710 targetm.calls.function_arg_advance (args_so_far, mode,
1717 /* A subroutine of emit_block_move. Expand a movmem pattern;
1718 return true if successful. */
1721 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1722 unsigned int expected_align, HOST_WIDE_INT expected_size,
1723 unsigned HOST_WIDE_INT min_size,
1724 unsigned HOST_WIDE_INT max_size,
1725 unsigned HOST_WIDE_INT probable_max_size)
1727 int save_volatile_ok = volatile_ok;
1729 if (expected_align < align)
1730 expected_align = align;
1731 if (expected_size != -1)
1733 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1734 expected_size = probable_max_size;
1735 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1736 expected_size = min_size;
1739 /* Since this is a move insn, we don't care about volatility. */
1742 /* Try the most limited insn first, because there's no point
1743 including more than one in the machine description unless
1744 the more limited one has some advantage. */
1746 opt_scalar_int_mode mode_iter;
1747 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
1749 scalar_int_mode mode = mode_iter.require ();
1750 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1752 if (code != CODE_FOR_nothing
1753 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1754 here because if SIZE is less than the mode mask, as it is
1755 returned by the macro, it will definitely be less than the
1756 actual mode mask. Since SIZE is within the Pmode address
1757 space, we limit MODE to Pmode. */
1758 && ((CONST_INT_P (size)
1759 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1760 <= (GET_MODE_MASK (mode) >> 1)))
1761 || max_size <= (GET_MODE_MASK (mode) >> 1)
1762 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1764 struct expand_operand ops[9];
1767 /* ??? When called via emit_block_move_for_call, it'd be
1768 nice if there were some way to inform the backend, so
1769 that it doesn't fail the expansion because it thinks
1770 emitting the libcall would be more efficient. */
1771 nops = insn_data[(int) code].n_generator_args;
1772 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1774 create_fixed_operand (&ops[0], x);
1775 create_fixed_operand (&ops[1], y);
1776 /* The check above guarantees that this size conversion is valid. */
1777 create_convert_operand_to (&ops[2], size, mode, true);
1778 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1781 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1782 create_integer_operand (&ops[5], expected_size);
1786 create_integer_operand (&ops[6], min_size);
1787 /* If we can not represent the maximal size,
1788 make parameter NULL. */
1789 if ((HOST_WIDE_INT) max_size != -1)
1790 create_integer_operand (&ops[7], max_size);
1792 create_fixed_operand (&ops[7], NULL);
1796 /* If we can not represent the maximal size,
1797 make parameter NULL. */
1798 if ((HOST_WIDE_INT) probable_max_size != -1)
1799 create_integer_operand (&ops[8], probable_max_size);
1801 create_fixed_operand (&ops[8], NULL);
1803 if (maybe_expand_insn (code, nops, ops))
1805 volatile_ok = save_volatile_ok;
1811 volatile_ok = save_volatile_ok;
1815 /* A subroutine of emit_block_move. Copy the data via an explicit
1816 loop. This is used only when libcalls are forbidden. */
1817 /* ??? It'd be nice to copy in hunks larger than QImode. */
1820 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1821 unsigned int align ATTRIBUTE_UNUSED)
1823 rtx_code_label *cmp_label, *top_label;
1824 rtx iter, x_addr, y_addr, tmp;
1825 machine_mode x_addr_mode = get_address_mode (x);
1826 machine_mode y_addr_mode = get_address_mode (y);
1827 machine_mode iter_mode;
1829 iter_mode = GET_MODE (size);
1830 if (iter_mode == VOIDmode)
1831 iter_mode = word_mode;
1833 top_label = gen_label_rtx ();
1834 cmp_label = gen_label_rtx ();
1835 iter = gen_reg_rtx (iter_mode);
1837 emit_move_insn (iter, const0_rtx);
1839 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1840 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1841 do_pending_stack_adjust ();
1843 emit_jump (cmp_label);
1844 emit_label (top_label);
1846 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1847 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1849 if (x_addr_mode != y_addr_mode)
1850 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1851 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1853 x = change_address (x, QImode, x_addr);
1854 y = change_address (y, QImode, y_addr);
1856 emit_move_insn (x, y);
1858 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1859 true, OPTAB_LIB_WIDEN);
1861 emit_move_insn (iter, tmp);
1863 emit_label (cmp_label);
1865 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1867 profile_probability::guessed_always ()
1868 .apply_scale (9, 10));
1871 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1872 TAILCALL is true if this is a tail call. */
1875 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
1876 rtx size, bool tailcall)
1878 rtx dst_addr, src_addr;
1879 tree call_expr, dst_tree, src_tree, size_tree;
1880 machine_mode size_mode;
1882 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1883 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1884 dst_tree = make_tree (ptr_type_node, dst_addr);
1886 src_addr = copy_addr_to_reg (XEXP (src, 0));
1887 src_addr = convert_memory_address (ptr_mode, src_addr);
1888 src_tree = make_tree (ptr_type_node, src_addr);
1890 size_mode = TYPE_MODE (sizetype);
1891 size = convert_to_mode (size_mode, size, 1);
1892 size = copy_to_mode_reg (size_mode, size);
1893 size_tree = make_tree (sizetype, size);
1895 /* It is incorrect to use the libcall calling conventions for calls to
1896 memcpy/memmove/memcmp because they can be provided by the user. */
1897 tree fn = builtin_decl_implicit (fncode);
1898 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1899 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1901 return expand_call (call_expr, NULL_RTX, false);
1904 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1905 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1906 otherwise return null. */
1909 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
1910 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
1911 HOST_WIDE_INT align)
1913 machine_mode insn_mode = insn_data[icode].operand[0].mode;
1915 if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
1918 struct expand_operand ops[5];
1919 create_output_operand (&ops[0], target, insn_mode);
1920 create_fixed_operand (&ops[1], arg1_rtx);
1921 create_fixed_operand (&ops[2], arg2_rtx);
1922 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type),
1923 TYPE_UNSIGNED (arg3_type));
1924 create_integer_operand (&ops[4], align);
1925 if (maybe_expand_insn (icode, 5, ops))
1926 return ops[0].value;
1930 /* Expand a block compare between X and Y with length LEN using the
1931 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1932 of the expression that was used to calculate the length. ALIGN
1933 gives the known minimum common alignment. */
1936 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
1939 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1940 implementing memcmp because it will stop if it encounters two
1942 insn_code icode = direct_optab_handler (cmpmem_optab, SImode);
1944 if (icode == CODE_FOR_nothing)
1947 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
1950 /* Emit code to compare a block Y to a block X. This may be done with
1951 string-compare instructions, with multiple scalar instructions,
1952 or with a library call.
1954 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1955 they are. LEN_TYPE is the type of the expression that was used to
1958 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1959 value of a normal memcmp call, instead we can just compare for equality.
1960 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1963 Optionally, the caller can pass a constfn and associated data in Y_CFN
1964 and Y_CFN_DATA. describing that the second operand being compared is a
1965 known constant and how to obtain its data.
1966 Return the result of the comparison, or NULL_RTX if we failed to
1967 perform the operation. */
1970 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
1971 bool equality_only, by_pieces_constfn y_cfn,
1976 if (CONST_INT_P (len) && INTVAL (len) == 0)
1979 gcc_assert (MEM_P (x) && MEM_P (y));
1980 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1981 gcc_assert (align >= BITS_PER_UNIT);
1983 x = adjust_address (x, BLKmode, 0);
1984 y = adjust_address (y, BLKmode, 0);
1987 && CONST_INT_P (len)
1988 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES))
1989 result = compare_by_pieces (x, y, INTVAL (len), target, align,
1992 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);
1997 /* Copy all or part of a value X into registers starting at REGNO.
1998 The number of registers to be filled is NREGS. */
2001 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2006 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
2007 x = validize_mem (force_const_mem (mode, x));
2009 /* See if the machine can do this with a load multiple insn. */
2010 if (targetm.have_load_multiple ())
2012 rtx_insn *last = get_last_insn ();
2013 rtx first = gen_rtx_REG (word_mode, regno);
2014 if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
2021 delete_insns_since (last);
2024 for (int i = 0; i < nregs; i++)
2025 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
2026 operand_subword_force (x, i, mode));
2029 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2030 The number of registers to be filled is NREGS. */
2033 move_block_from_reg (int regno, rtx x, int nregs)
2038 /* See if the machine can do this with a store multiple insn. */
2039 if (targetm.have_store_multiple ())
2041 rtx_insn *last = get_last_insn ();
2042 rtx first = gen_rtx_REG (word_mode, regno);
2043 if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
2050 delete_insns_since (last);
2053 for (int i = 0; i < nregs; i++)
2055 rtx tem = operand_subword (x, i, 1, BLKmode);
2059 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
2063 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2064 ORIG, where ORIG is a non-consecutive group of registers represented by
2065 a PARALLEL. The clone is identical to the original except in that the
2066 original set of registers is replaced by a new set of pseudo registers.
2067 The new set has the same modes as the original set. */
2070 gen_group_rtx (rtx orig)
2075 gcc_assert (GET_CODE (orig) == PARALLEL);
2077 length = XVECLEN (orig, 0);
2078 tmps = XALLOCAVEC (rtx, length);
2080 /* Skip a NULL entry in first slot. */
2081 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
2086 for (; i < length; i++)
2088 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
2089 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
2091 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
2094 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
2097 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2098 except that values are placed in TMPS[i], and must later be moved
2099 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2102 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
2106 machine_mode m = GET_MODE (orig_src);
2108 gcc_assert (GET_CODE (dst) == PARALLEL);
2111 && !SCALAR_INT_MODE_P (m)
2112 && !MEM_P (orig_src)
2113 && GET_CODE (orig_src) != CONCAT)
2115 scalar_int_mode imode;
2116 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode))
2118 src = gen_reg_rtx (imode);
2119 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src);
2123 src = assign_stack_temp (GET_MODE (orig_src), ssize);
2124 emit_move_insn (src, orig_src);
2126 emit_group_load_1 (tmps, dst, src, type, ssize);
2130 /* Check for a NULL entry, used to indicate that the parameter goes
2131 both on the stack and in registers. */
2132 if (XEXP (XVECEXP (dst, 0, 0), 0))
2137 /* Process the pieces. */
2138 for (i = start; i < XVECLEN (dst, 0); i++)
2140 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
2141 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
2142 unsigned int bytelen = GET_MODE_SIZE (mode);
2145 /* Handle trailing fragments that run over the size of the struct. */
2146 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2148 /* Arrange to shift the fragment to where it belongs.
2149 extract_bit_field loads to the lsb of the reg. */
2151 #ifdef BLOCK_REG_PADDING
2152 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
2153 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2158 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2159 bytelen = ssize - bytepos;
2160 gcc_assert (bytelen > 0);
2163 /* If we won't be loading directly from memory, protect the real source
2164 from strange tricks we might play; but make sure that the source can
2165 be loaded directly into the destination. */
2167 if (!MEM_P (orig_src)
2168 && (!CONSTANT_P (orig_src)
2169 || (GET_MODE (orig_src) != mode
2170 && GET_MODE (orig_src) != VOIDmode)))
2172 if (GET_MODE (orig_src) == VOIDmode)
2173 src = gen_reg_rtx (mode);
2175 src = gen_reg_rtx (GET_MODE (orig_src));
2177 emit_move_insn (src, orig_src);
2180 /* Optimize the access just a bit. */
2182 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src))
2183 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
2184 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2185 && bytelen == GET_MODE_SIZE (mode))
2187 tmps[i] = gen_reg_rtx (mode);
2188 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
2190 else if (COMPLEX_MODE_P (mode)
2191 && GET_MODE (src) == mode
2192 && bytelen == GET_MODE_SIZE (mode))
2193 /* Let emit_move_complex do the bulk of the work. */
2195 else if (GET_CODE (src) == CONCAT)
2197 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
2198 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
2199 unsigned int elt = bytepos / slen0;
2200 unsigned int subpos = bytepos % slen0;
2202 if (subpos + bytelen <= slen0)
2204 /* The following assumes that the concatenated objects all
2205 have the same size. In this case, a simple calculation
2206 can be used to determine the object and the bit field
2208 tmps[i] = XEXP (src, elt);
2210 || subpos + bytelen != slen0
2211 || (!CONSTANT_P (tmps[i])
2212 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
2213 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
2214 subpos * BITS_PER_UNIT,
2215 1, NULL_RTX, mode, mode, false,
2222 gcc_assert (!bytepos);
2223 mem = assign_stack_temp (GET_MODE (src), slen);
2224 emit_move_insn (mem, src);
2225 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
2226 0, 1, NULL_RTX, mode, mode, false,
2230 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2231 SIMD register, which is currently broken. While we get GCC
2232 to emit proper RTL for these cases, let's dump to memory. */
2233 else if (VECTOR_MODE_P (GET_MODE (dst))
2236 int slen = GET_MODE_SIZE (GET_MODE (src));
2239 mem = assign_stack_temp (GET_MODE (src), slen);
2240 emit_move_insn (mem, src);
2241 tmps[i] = adjust_address (mem, mode, (int) bytepos);
2243 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
2244 && XVECLEN (dst, 0) > 1)
2245 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
2246 else if (CONSTANT_P (src))
2248 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
2256 /* TODO: const_wide_int can have sizes other than this... */
2257 gcc_assert (2 * len == ssize);
2258 split_double (src, &first, &second);
2265 else if (REG_P (src) && GET_MODE (src) == mode)
2268 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
2269 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
2270 mode, mode, false, NULL);
2273 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
2278 /* Emit code to move a block SRC of type TYPE to a block DST,
2279 where DST is non-consecutive registers represented by a PARALLEL.
2280 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2284 emit_group_load (rtx dst, rtx src, tree type, int ssize)
2289 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
2290 emit_group_load_1 (tmps, dst, src, type, ssize);
2292 /* Copy the extracted pieces into the proper (probable) hard regs. */
2293 for (i = 0; i < XVECLEN (dst, 0); i++)
2295 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
2298 emit_move_insn (d, tmps[i]);
2302 /* Similar, but load SRC into new pseudos in a format that looks like
2303 PARALLEL. This can later be fed to emit_group_move to get things
2304 in the right place. */
2307 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
2312 vec = rtvec_alloc (XVECLEN (parallel, 0));
2313 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
2315 /* Convert the vector to look just like the original PARALLEL, except
2316 with the computed values. */
2317 for (i = 0; i < XVECLEN (parallel, 0); i++)
2319 rtx e = XVECEXP (parallel, 0, i);
2320 rtx d = XEXP (e, 0);
2324 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
2325 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
2327 RTVEC_ELT (vec, i) = e;
2330 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
2333 /* Emit code to move a block SRC to block DST, where SRC and DST are
2334 non-consecutive groups of registers, each represented by a PARALLEL. */
2337 emit_group_move (rtx dst, rtx src)
2341 gcc_assert (GET_CODE (src) == PARALLEL
2342 && GET_CODE (dst) == PARALLEL
2343 && XVECLEN (src, 0) == XVECLEN (dst, 0));
2345 /* Skip first entry if NULL. */
2346 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
2347 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
2348 XEXP (XVECEXP (src, 0, i), 0));
2351 /* Move a group of registers represented by a PARALLEL into pseudos. */
2354 emit_group_move_into_temps (rtx src)
2356 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
2359 for (i = 0; i < XVECLEN (src, 0); i++)
2361 rtx e = XVECEXP (src, 0, i);
2362 rtx d = XEXP (e, 0);
2365 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
2366 RTVEC_ELT (vec, i) = e;
2369 return gen_rtx_PARALLEL (GET_MODE (src), vec);
2372 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2373 where SRC is non-consecutive registers represented by a PARALLEL.
2374 SSIZE represents the total size of block ORIG_DST, or -1 if not
2378 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
2381 int start, finish, i;
2382 machine_mode m = GET_MODE (orig_dst);
2384 gcc_assert (GET_CODE (src) == PARALLEL);
2386 if (!SCALAR_INT_MODE_P (m)
2387 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
2389 scalar_int_mode imode;
2390 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode))
2392 dst = gen_reg_rtx (imode);
2393 emit_group_store (dst, src, type, ssize);
2394 dst = gen_lowpart (GET_MODE (orig_dst), dst);
2398 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
2399 emit_group_store (dst, src, type, ssize);
2401 emit_move_insn (orig_dst, dst);
2405 /* Check for a NULL entry, used to indicate that the parameter goes
2406 both on the stack and in registers. */
2407 if (XEXP (XVECEXP (src, 0, 0), 0))
2411 finish = XVECLEN (src, 0);
2413 tmps = XALLOCAVEC (rtx, finish);
2415 /* Copy the (probable) hard regs into pseudos. */
2416 for (i = start; i < finish; i++)
2418 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
2419 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
2421 tmps[i] = gen_reg_rtx (GET_MODE (reg));
2422 emit_move_insn (tmps[i], reg);
2428 /* If we won't be storing directly into memory, protect the real destination
2429 from strange tricks we might play. */
2431 if (GET_CODE (dst) == PARALLEL)
2435 /* We can get a PARALLEL dst if there is a conditional expression in
2436 a return statement. In that case, the dst and src are the same,
2437 so no action is necessary. */
2438 if (rtx_equal_p (dst, src))
2441 /* It is unclear if we can ever reach here, but we may as well handle
2442 it. Allocate a temporary, and split this into a store/load to/from
2444 temp = assign_stack_temp (GET_MODE (dst), ssize);
2445 emit_group_store (temp, src, type, ssize);
2446 emit_group_load (dst, temp, type, ssize);
2449 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2451 machine_mode outer = GET_MODE (dst);
2453 HOST_WIDE_INT bytepos;
2457 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2458 dst = gen_reg_rtx (outer);
2460 /* Make life a bit easier for combine. */
2461 /* If the first element of the vector is the low part
2462 of the destination mode, use a paradoxical subreg to
2463 initialize the destination. */
2466 inner = GET_MODE (tmps[start]);
2467 bytepos = subreg_lowpart_offset (inner, outer);
2468 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
2470 temp = simplify_gen_subreg (outer, tmps[start],
2474 emit_move_insn (dst, temp);
2481 /* If the first element wasn't the low part, try the last. */
2483 && start < finish - 1)
2485 inner = GET_MODE (tmps[finish - 1]);
2486 bytepos = subreg_lowpart_offset (inner, outer);
2487 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2489 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2493 emit_move_insn (dst, temp);
2500 /* Otherwise, simply initialize the result to zero. */
2502 emit_move_insn (dst, CONST0_RTX (outer));
2505 /* Process the pieces. */
2506 for (i = start; i < finish; i++)
2508 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2509 machine_mode mode = GET_MODE (tmps[i]);
2510 unsigned int bytelen = GET_MODE_SIZE (mode);
2511 unsigned int adj_bytelen;
2514 /* Handle trailing fragments that run over the size of the struct. */
2515 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2516 adj_bytelen = ssize - bytepos;
2518 adj_bytelen = bytelen;
2520 if (GET_CODE (dst) == CONCAT)
2522 if (bytepos + adj_bytelen
2523 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2524 dest = XEXP (dst, 0);
2525 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2527 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2528 dest = XEXP (dst, 1);
2532 machine_mode dest_mode = GET_MODE (dest);
2533 machine_mode tmp_mode = GET_MODE (tmps[i]);
2535 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2537 if (GET_MODE_ALIGNMENT (dest_mode)
2538 >= GET_MODE_ALIGNMENT (tmp_mode))
2540 dest = assign_stack_temp (dest_mode,
2541 GET_MODE_SIZE (dest_mode));
2542 emit_move_insn (adjust_address (dest,
2550 dest = assign_stack_temp (tmp_mode,
2551 GET_MODE_SIZE (tmp_mode));
2552 emit_move_insn (dest, tmps[i]);
2553 dst = adjust_address (dest, dest_mode, bytepos);
2559 /* Handle trailing fragments that run over the size of the struct. */
2560 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2562 /* store_bit_field always takes its value from the lsb.
2563 Move the fragment to the lsb if it's not already there. */
2565 #ifdef BLOCK_REG_PADDING
2566 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2567 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2573 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2574 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2578 /* Make sure not to write past the end of the struct. */
2579 store_bit_field (dest,
2580 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2581 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2582 VOIDmode, tmps[i], false);
2585 /* Optimize the access just a bit. */
2586 else if (MEM_P (dest)
2587 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest))
2588 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2589 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2590 && bytelen == GET_MODE_SIZE (mode))
2591 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2594 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2595 0, 0, mode, tmps[i], false);
2598 /* Copy from the pseudo into the (probable) hard reg. */
2599 if (orig_dst != dst)
2600 emit_move_insn (orig_dst, dst);
2603 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2604 of the value stored in X. */
2607 maybe_emit_group_store (rtx x, tree type)
2609 machine_mode mode = TYPE_MODE (type);
2610 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2611 if (GET_CODE (x) == PARALLEL)
2613 rtx result = gen_reg_rtx (mode);
2614 emit_group_store (result, x, type, int_size_in_bytes (type));
2620 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2622 This is used on targets that return BLKmode values in registers. */
2625 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2627 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2628 rtx src = NULL, dst = NULL;
2629 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2630 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2631 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2632 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg));
2633 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target));
2634 fixed_size_mode copy_mode;
2636 /* BLKmode registers created in the back-end shouldn't have survived. */
2637 gcc_assert (mode != BLKmode);
2639 /* If the structure doesn't take up a whole number of words, see whether
2640 SRCREG is padded on the left or on the right. If it's on the left,
2641 set PADDING_CORRECTION to the number of bits to skip.
2643 In most ABIs, the structure will be returned at the least end of
2644 the register, which translates to right padding on little-endian
2645 targets and left padding on big-endian targets. The opposite
2646 holds if the structure is returned at the most significant
2647 end of the register. */
2648 if (bytes % UNITS_PER_WORD != 0
2649 && (targetm.calls.return_in_msb (type)
2651 : BYTES_BIG_ENDIAN))
2653 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2655 /* We can use a single move if we have an exact mode for the size. */
2656 else if (MEM_P (target)
2657 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target))
2658 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2659 && bytes == GET_MODE_SIZE (mode))
2661 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2665 /* And if we additionally have the same mode for a register. */
2666 else if (REG_P (target)
2667 && GET_MODE (target) == mode
2668 && bytes == GET_MODE_SIZE (mode))
2670 emit_move_insn (target, srcreg);
2674 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2675 into a new pseudo which is a full word. */
2676 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2678 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2682 /* Copy the structure BITSIZE bits at a time. If the target lives in
2683 memory, take care of not reading/writing past its end by selecting
2684 a copy mode suited to BITSIZE. This should always be possible given
2687 If the target lives in register, make sure not to select a copy mode
2688 larger than the mode of the register.
2690 We could probably emit more efficient code for machines which do not use
2691 strict alignment, but it doesn't seem worth the effort at the current
2694 copy_mode = word_mode;
2697 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
2698 if (mem_mode.exists ())
2699 copy_mode = mem_mode.require ();
2701 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2704 for (bitpos = 0, xbitpos = padding_correction;
2705 bitpos < bytes * BITS_PER_UNIT;
2706 bitpos += bitsize, xbitpos += bitsize)
2708 /* We need a new source operand each time xbitpos is on a
2709 word boundary and when xbitpos == padding_correction
2710 (the first time through). */
2711 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2712 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2714 /* We need a new destination operand each time bitpos is on
2716 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2718 else if (bitpos % BITS_PER_WORD == 0)
2719 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2721 /* Use xbitpos for the source extraction (right justified) and
2722 bitpos for the destination store (left justified). */
2723 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2724 extract_bit_field (src, bitsize,
2725 xbitpos % BITS_PER_WORD, 1,
2726 NULL_RTX, copy_mode, copy_mode,
2732 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2733 register if it contains any data, otherwise return null.
2735 This is used on targets that return BLKmode values in registers. */
2738 copy_blkmode_to_reg (machine_mode mode_in, tree src)
2741 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2742 unsigned int bitsize;
2743 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2744 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2745 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
2746 fixed_size_mode dst_mode;
2748 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2750 x = expand_normal (src);
2752 bytes = arg_int_size_in_bytes (TREE_TYPE (src));
2756 /* If the structure doesn't take up a whole number of words, see
2757 whether the register value should be padded on the left or on
2758 the right. Set PADDING_CORRECTION to the number of padding
2759 bits needed on the left side.
2761 In most ABIs, the structure will be returned at the least end of
2762 the register, which translates to right padding on little-endian
2763 targets and left padding on big-endian targets. The opposite
2764 holds if the structure is returned at the most significant
2765 end of the register. */
2766 if (bytes % UNITS_PER_WORD != 0
2767 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2769 : BYTES_BIG_ENDIAN))
2770 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2773 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2774 dst_words = XALLOCAVEC (rtx, n_regs);
2775 bitsize = BITS_PER_WORD;
2776 if (targetm.slow_unaligned_access (word_mode, TYPE_ALIGN (TREE_TYPE (src))))
2777 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2779 /* Copy the structure BITSIZE bits at a time. */
2780 for (bitpos = 0, xbitpos = padding_correction;
2781 bitpos < bytes * BITS_PER_UNIT;
2782 bitpos += bitsize, xbitpos += bitsize)
2784 /* We need a new destination pseudo each time xbitpos is
2785 on a word boundary and when xbitpos == padding_correction
2786 (the first time through). */
2787 if (xbitpos % BITS_PER_WORD == 0
2788 || xbitpos == padding_correction)
2790 /* Generate an appropriate register. */
2791 dst_word = gen_reg_rtx (word_mode);
2792 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2794 /* Clear the destination before we move anything into it. */
2795 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2798 /* We need a new source operand each time bitpos is on a word
2800 if (bitpos % BITS_PER_WORD == 0)
2801 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2803 /* Use bitpos for the source extraction (left justified) and
2804 xbitpos for the destination store (right justified). */
2805 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2807 extract_bit_field (src_word, bitsize,
2808 bitpos % BITS_PER_WORD, 1,
2809 NULL_RTX, word_mode, word_mode,
2814 if (mode == BLKmode)
2816 /* Find the smallest integer mode large enough to hold the
2817 entire structure. */
2818 opt_scalar_int_mode mode_iter;
2819 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
2820 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
2823 /* A suitable mode should have been found. */
2824 mode = mode_iter.require ();
2827 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2828 dst_mode = word_mode;
2831 dst = gen_reg_rtx (dst_mode);
2833 for (i = 0; i < n_regs; i++)
2834 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2836 if (mode != dst_mode)
2837 dst = gen_lowpart (mode, dst);
2842 /* Add a USE expression for REG to the (possibly empty) list pointed
2843 to by CALL_FUSAGE. REG must denote a hard register. */
2846 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2848 gcc_assert (REG_P (reg));
2850 if (!HARD_REGISTER_P (reg))
2854 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2857 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2858 to by CALL_FUSAGE. REG must denote a hard register. */
2861 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2863 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2866 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2869 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2870 starting at REGNO. All of these registers must be hard registers. */
2873 use_regs (rtx *call_fusage, int regno, int nregs)
2877 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2879 for (i = 0; i < nregs; i++)
2880 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2883 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2884 PARALLEL REGS. This is for calls that pass values in multiple
2885 non-contiguous locations. The Irix 6 ABI has examples of this. */
2888 use_group_regs (rtx *call_fusage, rtx regs)
2892 for (i = 0; i < XVECLEN (regs, 0); i++)
2894 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2896 /* A NULL entry means the parameter goes both on the stack and in
2897 registers. This can also be a MEM for targets that pass values
2898 partially on the stack and partially in registers. */
2899 if (reg != 0 && REG_P (reg))
2900 use_reg (call_fusage, reg);
2904 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2905 assigment and the code of the expresion on the RHS is CODE. Return
2909 get_def_for_expr (tree name, enum tree_code code)
2913 if (TREE_CODE (name) != SSA_NAME)
2916 def_stmt = get_gimple_for_ssa_name (name);
2918 || gimple_assign_rhs_code (def_stmt) != code)
2924 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2925 assigment and the class of the expresion on the RHS is CLASS. Return
2929 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2933 if (TREE_CODE (name) != SSA_NAME)
2936 def_stmt = get_gimple_for_ssa_name (name);
2938 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2944 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2945 its length in bytes. */
2948 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2949 unsigned int expected_align, HOST_WIDE_INT expected_size,
2950 unsigned HOST_WIDE_INT min_size,
2951 unsigned HOST_WIDE_INT max_size,
2952 unsigned HOST_WIDE_INT probable_max_size)
2954 machine_mode mode = GET_MODE (object);
2957 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2959 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2960 just move a zero. Otherwise, do this a piece at a time. */
2962 && CONST_INT_P (size)
2963 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2965 rtx zero = CONST0_RTX (mode);
2968 emit_move_insn (object, zero);
2972 if (COMPLEX_MODE_P (mode))
2974 zero = CONST0_RTX (GET_MODE_INNER (mode));
2977 write_complex_part (object, zero, 0);
2978 write_complex_part (object, zero, 1);
2984 if (size == const0_rtx)
2987 align = MEM_ALIGN (object);
2989 if (CONST_INT_P (size)
2990 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
2992 optimize_insn_for_speed_p ()))
2993 clear_by_pieces (object, INTVAL (size), align);
2994 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2995 expected_align, expected_size,
2996 min_size, max_size, probable_max_size))
2998 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2999 return set_storage_via_libcall (object, size, const0_rtx,
3000 method == BLOCK_OP_TAILCALL);
3008 clear_storage (rtx object, rtx size, enum block_op_methods method)
3010 unsigned HOST_WIDE_INT max, min = 0;
3011 if (GET_CODE (size) == CONST_INT)
3012 min = max = UINTVAL (size);
3014 max = GET_MODE_MASK (GET_MODE (size));
3015 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
3019 /* A subroutine of clear_storage. Expand a call to memset.
3020 Return the return value of memset, 0 otherwise. */
3023 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3025 tree call_expr, fn, object_tree, size_tree, val_tree;
3026 machine_mode size_mode;
3028 object = copy_addr_to_reg (XEXP (object, 0));
3029 object_tree = make_tree (ptr_type_node, object);
3031 if (!CONST_INT_P (val))
3032 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
3033 val_tree = make_tree (integer_type_node, val);
3035 size_mode = TYPE_MODE (sizetype);
3036 size = convert_to_mode (size_mode, size, 1);
3037 size = copy_to_mode_reg (size_mode, size);
3038 size_tree = make_tree (sizetype, size);
3040 /* It is incorrect to use the libcall calling conventions for calls to
3041 memset because it can be provided by the user. */
3042 fn = builtin_decl_implicit (BUILT_IN_MEMSET);
3043 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
3044 CALL_EXPR_TAILCALL (call_expr) = tailcall;
3046 return expand_call (call_expr, NULL_RTX, false);
3049 /* Expand a setmem pattern; return true if successful. */
3052 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
3053 unsigned int expected_align, HOST_WIDE_INT expected_size,
3054 unsigned HOST_WIDE_INT min_size,
3055 unsigned HOST_WIDE_INT max_size,
3056 unsigned HOST_WIDE_INT probable_max_size)
3058 /* Try the most limited insn first, because there's no point
3059 including more than one in the machine description unless
3060 the more limited one has some advantage. */
3062 if (expected_align < align)
3063 expected_align = align;
3064 if (expected_size != -1)
3066 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
3067 expected_size = max_size;
3068 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
3069 expected_size = min_size;
3072 opt_scalar_int_mode mode_iter;
3073 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
3075 scalar_int_mode mode = mode_iter.require ();
3076 enum insn_code code = direct_optab_handler (setmem_optab, mode);
3078 if (code != CODE_FOR_nothing
3079 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3080 here because if SIZE is less than the mode mask, as it is
3081 returned by the macro, it will definitely be less than the
3082 actual mode mask. Since SIZE is within the Pmode address
3083 space, we limit MODE to Pmode. */
3084 && ((CONST_INT_P (size)
3085 && ((unsigned HOST_WIDE_INT) INTVAL (size)
3086 <= (GET_MODE_MASK (mode) >> 1)))
3087 || max_size <= (GET_MODE_MASK (mode) >> 1)
3088 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
3090 struct expand_operand ops[9];
3093 nops = insn_data[(int) code].n_generator_args;
3094 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
3096 create_fixed_operand (&ops[0], object);
3097 /* The check above guarantees that this size conversion is valid. */
3098 create_convert_operand_to (&ops[1], size, mode, true);
3099 create_convert_operand_from (&ops[2], val, byte_mode, true);
3100 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
3103 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
3104 create_integer_operand (&ops[5], expected_size);
3108 create_integer_operand (&ops[6], min_size);
3109 /* If we can not represent the maximal size,
3110 make parameter NULL. */
3111 if ((HOST_WIDE_INT) max_size != -1)
3112 create_integer_operand (&ops[7], max_size);
3114 create_fixed_operand (&ops[7], NULL);
3118 /* If we can not represent the maximal size,
3119 make parameter NULL. */
3120 if ((HOST_WIDE_INT) probable_max_size != -1)
3121 create_integer_operand (&ops[8], probable_max_size);
3123 create_fixed_operand (&ops[8], NULL);
3125 if (maybe_expand_insn (code, nops, ops))
3134 /* Write to one of the components of the complex value CPLX. Write VAL to
3135 the real part if IMAG_P is false, and the imaginary part if its true. */
3138 write_complex_part (rtx cplx, rtx val, bool imag_p)
3144 if (GET_CODE (cplx) == CONCAT)
3146 emit_move_insn (XEXP (cplx, imag_p), val);
3150 cmode = GET_MODE (cplx);
3151 imode = GET_MODE_INNER (cmode);
3152 ibitsize = GET_MODE_BITSIZE (imode);
3154 /* For MEMs simplify_gen_subreg may generate an invalid new address
3155 because, e.g., the original address is considered mode-dependent
3156 by the target, which restricts simplify_subreg from invoking
3157 adjust_address_nv. Instead of preparing fallback support for an
3158 invalid address, we call adjust_address_nv directly. */
3161 emit_move_insn (adjust_address_nv (cplx, imode,
3162 imag_p ? GET_MODE_SIZE (imode) : 0),
3167 /* If the sub-object is at least word sized, then we know that subregging
3168 will work. This special case is important, since store_bit_field
3169 wants to operate on integer modes, and there's rarely an OImode to
3170 correspond to TCmode. */
3171 if (ibitsize >= BITS_PER_WORD
3172 /* For hard regs we have exact predicates. Assume we can split
3173 the original object if it spans an even number of hard regs.
3174 This special case is important for SCmode on 64-bit platforms
3175 where the natural size of floating-point regs is 32-bit. */
3177 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3178 && REG_NREGS (cplx) % 2 == 0))
3180 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3181 imag_p ? GET_MODE_SIZE (imode) : 0);
3184 emit_move_insn (part, val);
3188 /* simplify_gen_subreg may fail for sub-word MEMs. */
3189 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3192 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
3196 /* Extract one of the components of the complex value CPLX. Extract the
3197 real part if IMAG_P is false, and the imaginary part if it's true. */
3200 read_complex_part (rtx cplx, bool imag_p)
3206 if (GET_CODE (cplx) == CONCAT)
3207 return XEXP (cplx, imag_p);
3209 cmode = GET_MODE (cplx);
3210 imode = GET_MODE_INNER (cmode);
3211 ibitsize = GET_MODE_BITSIZE (imode);
3213 /* Special case reads from complex constants that got spilled to memory. */
3214 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3216 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3217 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3219 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3220 if (CONSTANT_CLASS_P (part))
3221 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3225 /* For MEMs simplify_gen_subreg may generate an invalid new address
3226 because, e.g., the original address is considered mode-dependent
3227 by the target, which restricts simplify_subreg from invoking
3228 adjust_address_nv. Instead of preparing fallback support for an
3229 invalid address, we call adjust_address_nv directly. */
3231 return adjust_address_nv (cplx, imode,
3232 imag_p ? GET_MODE_SIZE (imode) : 0);
3234 /* If the sub-object is at least word sized, then we know that subregging
3235 will work. This special case is important, since extract_bit_field
3236 wants to operate on integer modes, and there's rarely an OImode to
3237 correspond to TCmode. */
3238 if (ibitsize >= BITS_PER_WORD
3239 /* For hard regs we have exact predicates. Assume we can split
3240 the original object if it spans an even number of hard regs.
3241 This special case is important for SCmode on 64-bit platforms
3242 where the natural size of floating-point regs is 32-bit. */
3244 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3245 && REG_NREGS (cplx) % 2 == 0))
3247 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3248 imag_p ? GET_MODE_SIZE (imode) : 0);
3252 /* simplify_gen_subreg may fail for sub-word MEMs. */
3253 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3256 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3257 true, NULL_RTX, imode, imode, false, NULL);
3260 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3261 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3262 represented in NEW_MODE. If FORCE is true, this will never happen, as
3263 we'll force-create a SUBREG if needed. */
3266 emit_move_change_mode (machine_mode new_mode,
3267 machine_mode old_mode, rtx x, bool force)
3271 if (push_operand (x, GET_MODE (x)))
3273 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3274 MEM_COPY_ATTRIBUTES (ret, x);
3278 /* We don't have to worry about changing the address since the
3279 size in bytes is supposed to be the same. */
3280 if (reload_in_progress)
3282 /* Copy the MEM to change the mode and move any
3283 substitutions from the old MEM to the new one. */
3284 ret = adjust_address_nv (x, new_mode, 0);
3285 copy_replacements (x, ret);
3288 ret = adjust_address (x, new_mode, 0);
3292 /* Note that we do want simplify_subreg's behavior of validating
3293 that the new mode is ok for a hard register. If we were to use
3294 simplify_gen_subreg, we would create the subreg, but would
3295 probably run into the target not being able to implement it. */
3296 /* Except, of course, when FORCE is true, when this is exactly what
3297 we want. Which is needed for CCmodes on some targets. */
3299 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3301 ret = simplify_subreg (new_mode, x, old_mode, 0);
3307 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3308 an integer mode of the same size as MODE. Returns the instruction
3309 emitted, or NULL if such a move could not be generated. */
3312 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3314 scalar_int_mode imode;
3315 enum insn_code code;
3317 /* There must exist a mode of the exact size we require. */
3318 if (!int_mode_for_mode (mode).exists (&imode))
3321 /* The target must support moves in this mode. */
3322 code = optab_handler (mov_optab, imode);
3323 if (code == CODE_FOR_nothing)
3326 x = emit_move_change_mode (imode, mode, x, force);
3329 y = emit_move_change_mode (imode, mode, y, force);
3332 return emit_insn (GEN_FCN (code) (x, y));
3335 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3336 Return an equivalent MEM that does not use an auto-increment. */
3339 emit_move_resolve_push (machine_mode mode, rtx x)
3341 enum rtx_code code = GET_CODE (XEXP (x, 0));
3342 HOST_WIDE_INT adjust;
3345 adjust = GET_MODE_SIZE (mode);
3346 #ifdef PUSH_ROUNDING
3347 adjust = PUSH_ROUNDING (adjust);
3349 if (code == PRE_DEC || code == POST_DEC)
3351 else if (code == PRE_MODIFY || code == POST_MODIFY)
3353 rtx expr = XEXP (XEXP (x, 0), 1);
3356 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3357 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3358 val = INTVAL (XEXP (expr, 1));
3359 if (GET_CODE (expr) == MINUS)
3361 gcc_assert (adjust == val || adjust == -val);
3365 /* Do not use anti_adjust_stack, since we don't want to update
3366 stack_pointer_delta. */
3367 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3368 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3369 0, OPTAB_LIB_WIDEN);
3370 if (temp != stack_pointer_rtx)
3371 emit_move_insn (stack_pointer_rtx, temp);
3378 temp = stack_pointer_rtx;
3383 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3389 return replace_equiv_address (x, temp);
3392 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3393 X is known to satisfy push_operand, and MODE is known to be complex.
3394 Returns the last instruction emitted. */
3397 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3399 scalar_mode submode = GET_MODE_INNER (mode);
3402 #ifdef PUSH_ROUNDING
3403 unsigned int submodesize = GET_MODE_SIZE (submode);
3405 /* In case we output to the stack, but the size is smaller than the
3406 machine can push exactly, we need to use move instructions. */
3407 if (PUSH_ROUNDING (submodesize) != submodesize)
3409 x = emit_move_resolve_push (mode, x);
3410 return emit_move_insn (x, y);
3414 /* Note that the real part always precedes the imag part in memory
3415 regardless of machine's endianness. */
3416 switch (GET_CODE (XEXP (x, 0)))
3430 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3431 read_complex_part (y, imag_first));
3432 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3433 read_complex_part (y, !imag_first));
3436 /* A subroutine of emit_move_complex. Perform the move from Y to X
3437 via two moves of the parts. Returns the last instruction emitted. */
3440 emit_move_complex_parts (rtx x, rtx y)
3442 /* Show the output dies here. This is necessary for SUBREGs
3443 of pseudos since we cannot track their lifetimes correctly;
3444 hard regs shouldn't appear here except as return values. */
3445 if (!reload_completed && !reload_in_progress
3446 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3449 write_complex_part (x, read_complex_part (y, false), false);
3450 write_complex_part (x, read_complex_part (y, true), true);
3452 return get_last_insn ();
3455 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3456 MODE is known to be complex. Returns the last instruction emitted. */
3459 emit_move_complex (machine_mode mode, rtx x, rtx y)
3463 /* Need to take special care for pushes, to maintain proper ordering
3464 of the data, and possibly extra padding. */
3465 if (push_operand (x, mode))
3466 return emit_move_complex_push (mode, x, y);
3468 /* See if we can coerce the target into moving both values at once, except
3469 for floating point where we favor moving as parts if this is easy. */
3470 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3471 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3473 && HARD_REGISTER_P (x)
3474 && REG_NREGS (x) == 1)
3476 && HARD_REGISTER_P (y)
3477 && REG_NREGS (y) == 1))
3479 /* Not possible if the values are inherently not adjacent. */
3480 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3482 /* Is possible if both are registers (or subregs of registers). */
3483 else if (register_operand (x, mode) && register_operand (y, mode))
3485 /* If one of the operands is a memory, and alignment constraints
3486 are friendly enough, we may be able to do combined memory operations.
3487 We do not attempt this if Y is a constant because that combination is
3488 usually better with the by-parts thing below. */
3489 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3490 && (!STRICT_ALIGNMENT
3491 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3500 /* For memory to memory moves, optimal behavior can be had with the
3501 existing block move logic. */
3502 if (MEM_P (x) && MEM_P (y))
3504 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3505 BLOCK_OP_NO_LIBCALL);
3506 return get_last_insn ();
3509 ret = emit_move_via_integer (mode, x, y, true);
3514 return emit_move_complex_parts (x, y);
3517 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3518 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3521 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3525 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3528 enum insn_code code = optab_handler (mov_optab, CCmode);
3529 if (code != CODE_FOR_nothing)
3531 x = emit_move_change_mode (CCmode, mode, x, true);
3532 y = emit_move_change_mode (CCmode, mode, y, true);
3533 return emit_insn (GEN_FCN (code) (x, y));
3537 /* Otherwise, find the MODE_INT mode of the same width. */
3538 ret = emit_move_via_integer (mode, x, y, false);
3539 gcc_assert (ret != NULL);
3543 /* Return true if word I of OP lies entirely in the
3544 undefined bits of a paradoxical subreg. */
3547 undefined_operand_subword_p (const_rtx op, int i)
3549 if (GET_CODE (op) != SUBREG)
3551 machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3552 HOST_WIDE_INT offset = i * UNITS_PER_WORD + subreg_memory_offset (op);
3553 return (offset >= GET_MODE_SIZE (innermostmode)
3554 || offset <= -UNITS_PER_WORD);
3557 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3558 MODE is any multi-word or full-word mode that lacks a move_insn
3559 pattern. Note that you will get better code if you define such
3560 patterns, even if they must turn into multiple assembler instructions. */
3563 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3565 rtx_insn *last_insn = 0;
3571 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3573 /* If X is a push on the stack, do the push now and replace
3574 X with a reference to the stack pointer. */
3575 if (push_operand (x, mode))
3576 x = emit_move_resolve_push (mode, x);
3578 /* If we are in reload, see if either operand is a MEM whose address
3579 is scheduled for replacement. */
3580 if (reload_in_progress && MEM_P (x)
3581 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3582 x = replace_equiv_address_nv (x, inner);
3583 if (reload_in_progress && MEM_P (y)
3584 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3585 y = replace_equiv_address_nv (y, inner);
3589 need_clobber = false;
3591 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3594 rtx xpart = operand_subword (x, i, 1, mode);
3597 /* Do not generate code for a move if it would come entirely
3598 from the undefined bits of a paradoxical subreg. */
3599 if (undefined_operand_subword_p (y, i))
3602 ypart = operand_subword (y, i, 1, mode);
3604 /* If we can't get a part of Y, put Y into memory if it is a
3605 constant. Otherwise, force it into a register. Then we must
3606 be able to get a part of Y. */
3607 if (ypart == 0 && CONSTANT_P (y))
3609 y = use_anchored_address (force_const_mem (mode, y));
3610 ypart = operand_subword (y, i, 1, mode);
3612 else if (ypart == 0)
3613 ypart = operand_subword_force (y, i, mode);
3615 gcc_assert (xpart && ypart);
3617 need_clobber |= (GET_CODE (xpart) == SUBREG);
3619 last_insn = emit_move_insn (xpart, ypart);
3625 /* Show the output dies here. This is necessary for SUBREGs
3626 of pseudos since we cannot track their lifetimes correctly;
3627 hard regs shouldn't appear here except as return values.
3628 We never want to emit such a clobber after reload. */
3630 && ! (reload_in_progress || reload_completed)
3631 && need_clobber != 0)
3639 /* Low level part of emit_move_insn.
3640 Called just like emit_move_insn, but assumes X and Y
3641 are basically valid. */
3644 emit_move_insn_1 (rtx x, rtx y)
3646 machine_mode mode = GET_MODE (x);
3647 enum insn_code code;
3649 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3651 code = optab_handler (mov_optab, mode);
3652 if (code != CODE_FOR_nothing)
3653 return emit_insn (GEN_FCN (code) (x, y));
3655 /* Expand complex moves by moving real part and imag part. */
3656 if (COMPLEX_MODE_P (mode))
3657 return emit_move_complex (mode, x, y);
3659 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3660 || ALL_FIXED_POINT_MODE_P (mode))
3662 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3664 /* If we can't find an integer mode, use multi words. */
3668 return emit_move_multi_word (mode, x, y);
3671 if (GET_MODE_CLASS (mode) == MODE_CC)
3672 return emit_move_ccmode (mode, x, y);
3674 /* Try using a move pattern for the corresponding integer mode. This is
3675 only safe when simplify_subreg can convert MODE constants into integer
3676 constants. At present, it can only do this reliably if the value
3677 fits within a HOST_WIDE_INT. */
3678 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3680 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3684 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3689 return emit_move_multi_word (mode, x, y);
3692 /* Generate code to copy Y into X.
3693 Both Y and X must have the same mode, except that
3694 Y can be a constant with VOIDmode.
3695 This mode cannot be BLKmode; use emit_block_move for that.
3697 Return the last instruction emitted. */
3700 emit_move_insn (rtx x, rtx y)
3702 machine_mode mode = GET_MODE (x);
3703 rtx y_cst = NULL_RTX;
3704 rtx_insn *last_insn;
3707 gcc_assert (mode != BLKmode
3708 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3713 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3714 && (last_insn = compress_float_constant (x, y)))
3719 if (!targetm.legitimate_constant_p (mode, y))
3721 y = force_const_mem (mode, y);
3723 /* If the target's cannot_force_const_mem prevented the spill,
3724 assume that the target's move expanders will also take care
3725 of the non-legitimate constant. */
3729 y = use_anchored_address (y);
3733 /* If X or Y are memory references, verify that their addresses are valid
3736 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3738 && ! push_operand (x, GET_MODE (x))))
3739 x = validize_mem (x);
3742 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3743 MEM_ADDR_SPACE (y)))
3744 y = validize_mem (y);
3746 gcc_assert (mode != BLKmode);
3748 last_insn = emit_move_insn_1 (x, y);
3750 if (y_cst && REG_P (x)
3751 && (set = single_set (last_insn)) != NULL_RTX
3752 && SET_DEST (set) == x
3753 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3754 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3759 /* Generate the body of an instruction to copy Y into X.
3760 It may be a list of insns, if one insn isn't enough. */
3763 gen_move_insn (rtx x, rtx y)
3768 emit_move_insn_1 (x, y);
3774 /* If Y is representable exactly in a narrower mode, and the target can
3775 perform the extension directly from constant or memory, then emit the
3776 move as an extension. */
3779 compress_float_constant (rtx x, rtx y)
3781 machine_mode dstmode = GET_MODE (x);
3782 machine_mode orig_srcmode = GET_MODE (y);
3783 machine_mode srcmode;
3784 const REAL_VALUE_TYPE *r;
3785 int oldcost, newcost;
3786 bool speed = optimize_insn_for_speed_p ();
3788 r = CONST_DOUBLE_REAL_VALUE (y);
3790 if (targetm.legitimate_constant_p (dstmode, y))
3791 oldcost = set_src_cost (y, orig_srcmode, speed);
3793 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);
3795 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)
3799 rtx_insn *last_insn;
3801 /* Skip if the target can't extend this way. */
3802 ic = can_extend_p (dstmode, srcmode, 0);
3803 if (ic == CODE_FOR_nothing)
3806 /* Skip if the narrowed value isn't exact. */
3807 if (! exact_real_truncate (srcmode, r))
3810 trunc_y = const_double_from_real_value (*r, srcmode);
3812 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3814 /* Skip if the target needs extra instructions to perform
3816 if (!insn_operand_matches (ic, 1, trunc_y))
3818 /* This is valid, but may not be cheaper than the original. */
3819 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3821 if (oldcost < newcost)
3824 else if (float_extend_from_mem[dstmode][srcmode])
3826 trunc_y = force_const_mem (srcmode, trunc_y);
3827 /* This is valid, but may not be cheaper than the original. */
3828 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3830 if (oldcost < newcost)
3832 trunc_y = validize_mem (trunc_y);
3837 /* For CSE's benefit, force the compressed constant pool entry
3838 into a new pseudo. This constant may be used in different modes,
3839 and if not, combine will put things back together for us. */
3840 trunc_y = force_reg (srcmode, trunc_y);
3842 /* If x is a hard register, perform the extension into a pseudo,
3843 so that e.g. stack realignment code is aware of it. */
3845 if (REG_P (x) && HARD_REGISTER_P (x))
3846 target = gen_reg_rtx (dstmode);
3848 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3849 last_insn = get_last_insn ();
3852 set_unique_reg_note (last_insn, REG_EQUAL, y);
3855 return emit_move_insn (x, target);
3862 /* Pushing data onto the stack. */
3864 /* Push a block of length SIZE (perhaps variable)
3865 and return an rtx to address the beginning of the block.
3866 The value may be virtual_outgoing_args_rtx.
3868 EXTRA is the number of bytes of padding to push in addition to SIZE.
3869 BELOW nonzero means this padding comes at low addresses;
3870 otherwise, the padding comes at high addresses. */
3873 push_block (rtx size, int extra, int below)
3877 size = convert_modes (Pmode, ptr_mode, size, 1);
3878 if (CONSTANT_P (size))
3879 anti_adjust_stack (plus_constant (Pmode, size, extra));
3880 else if (REG_P (size) && extra == 0)
3881 anti_adjust_stack (size);
3884 temp = copy_to_mode_reg (Pmode, size);
3886 temp = expand_binop (Pmode, add_optab, temp,
3887 gen_int_mode (extra, Pmode),
3888 temp, 0, OPTAB_LIB_WIDEN);
3889 anti_adjust_stack (temp);
3892 if (STACK_GROWS_DOWNWARD)
3894 temp = virtual_outgoing_args_rtx;
3895 if (extra != 0 && below)
3896 temp = plus_constant (Pmode, temp, extra);
3900 if (CONST_INT_P (size))
3901 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3902 -INTVAL (size) - (below ? 0 : extra));
3903 else if (extra != 0 && !below)
3904 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3905 negate_rtx (Pmode, plus_constant (Pmode, size,
3908 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3909 negate_rtx (Pmode, size));
3912 return memory_address (NARROWEST_INT_MODE, temp);
3915 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3918 mem_autoinc_base (rtx mem)
3922 rtx addr = XEXP (mem, 0);
3923 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3924 return XEXP (addr, 0);
3929 /* A utility routine used here, in reload, and in try_split. The insns
3930 after PREV up to and including LAST are known to adjust the stack,
3931 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3932 placing notes as appropriate. PREV may be NULL, indicating the
3933 entire insn sequence prior to LAST should be scanned.
3935 The set of allowed stack pointer modifications is small:
3936 (1) One or more auto-inc style memory references (aka pushes),
3937 (2) One or more addition/subtraction with the SP as destination,
3938 (3) A single move insn with the SP as destination,
3939 (4) A call_pop insn,
3940 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3942 Insns in the sequence that do not modify the SP are ignored,
3943 except for noreturn calls.
3945 The return value is the amount of adjustment that can be trivially
3946 verified, via immediate operand or auto-inc. If the adjustment
3947 cannot be trivially extracted, the return value is INT_MIN. */
3950 find_args_size_adjust (rtx_insn *insn)
3955 pat = PATTERN (insn);
3958 /* Look for a call_pop pattern. */
3961 /* We have to allow non-call_pop patterns for the case
3962 of emit_single_push_insn of a TLS address. */
3963 if (GET_CODE (pat) != PARALLEL)
3966 /* All call_pop have a stack pointer adjust in the parallel.
3967 The call itself is always first, and the stack adjust is
3968 usually last, so search from the end. */
3969 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3971 set = XVECEXP (pat, 0, i);
3972 if (GET_CODE (set) != SET)
3974 dest = SET_DEST (set);
3975 if (dest == stack_pointer_rtx)
3978 /* We'd better have found the stack pointer adjust. */
3981 /* Fall through to process the extracted SET and DEST
3982 as if it was a standalone insn. */
3984 else if (GET_CODE (pat) == SET)
3986 else if ((set = single_set (insn)) != NULL)
3988 else if (GET_CODE (pat) == PARALLEL)
3990 /* ??? Some older ports use a parallel with a stack adjust
3991 and a store for a PUSH_ROUNDING pattern, rather than a
3992 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3993 /* ??? See h8300 and m68k, pushqi1. */
3994 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3996 set = XVECEXP (pat, 0, i);
3997 if (GET_CODE (set) != SET)
3999 dest = SET_DEST (set);
4000 if (dest == stack_pointer_rtx)
4003 /* We do not expect an auto-inc of the sp in the parallel. */
4004 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
4005 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4006 != stack_pointer_rtx);
4014 dest = SET_DEST (set);
4016 /* Look for direct modifications of the stack pointer. */
4017 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
4019 /* Look for a trivial adjustment, otherwise assume nothing. */
4020 /* Note that the SPU restore_stack_block pattern refers to
4021 the stack pointer in V4SImode. Consider that non-trivial. */
4022 if (SCALAR_INT_MODE_P (GET_MODE (dest))
4023 && GET_CODE (SET_SRC (set)) == PLUS
4024 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
4025 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
4026 return INTVAL (XEXP (SET_SRC (set), 1));
4027 /* ??? Reload can generate no-op moves, which will be cleaned
4028 up later. Recognize it and continue searching. */
4029 else if (rtx_equal_p (dest, SET_SRC (set)))
4032 return HOST_WIDE_INT_MIN;
4038 /* Otherwise only think about autoinc patterns. */
4039 if (mem_autoinc_base (dest) == stack_pointer_rtx)
4042 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4043 != stack_pointer_rtx);
4045 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
4046 mem = SET_SRC (set);
4050 addr = XEXP (mem, 0);
4051 switch (GET_CODE (addr))
4055 return GET_MODE_SIZE (GET_MODE (mem));
4058 return -GET_MODE_SIZE (GET_MODE (mem));
4061 addr = XEXP (addr, 1);
4062 gcc_assert (GET_CODE (addr) == PLUS);
4063 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
4064 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
4065 return INTVAL (XEXP (addr, 1));
4073 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, int end_args_size)
4075 int args_size = end_args_size;
4076 bool saw_unknown = false;
4079 for (insn = last; insn != prev; insn = PREV_INSN (insn))
4081 HOST_WIDE_INT this_delta;
4083 if (!NONDEBUG_INSN_P (insn))
4086 this_delta = find_args_size_adjust (insn);
4087 if (this_delta == 0)
4090 || ACCUMULATE_OUTGOING_ARGS
4091 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
4095 gcc_assert (!saw_unknown);
4096 if (this_delta == HOST_WIDE_INT_MIN)
4099 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
4100 if (STACK_GROWS_DOWNWARD)
4101 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
4103 args_size -= this_delta;
4106 return saw_unknown ? INT_MIN : args_size;
4109 #ifdef PUSH_ROUNDING
4110 /* Emit single push insn. */
4113 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4116 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4118 enum insn_code icode;
4120 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4121 /* If there is push pattern, use it. Otherwise try old way of throwing
4122 MEM representing push operation to move expander. */
4123 icode = optab_handler (push_optab, mode);
4124 if (icode != CODE_FOR_nothing)
4126 struct expand_operand ops[1];
4128 create_input_operand (&ops[0], x, mode);
4129 if (maybe_expand_insn (icode, 1, ops))
4132 if (GET_MODE_SIZE (mode) == rounded_size)
4133 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4134 /* If we are to pad downward, adjust the stack pointer first and
4135 then store X into the stack location using an offset. This is
4136 because emit_move_insn does not know how to pad; it does not have
4138 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
4140 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
4141 HOST_WIDE_INT offset;
4143 emit_move_insn (stack_pointer_rtx,
4144 expand_binop (Pmode,
4145 STACK_GROWS_DOWNWARD ? sub_optab
4148 gen_int_mode (rounded_size, Pmode),
4149 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4151 offset = (HOST_WIDE_INT) padding_size;
4152 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4153 /* We have already decremented the stack pointer, so get the
4155 offset += (HOST_WIDE_INT) rounded_size;
4157 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4158 /* We have already incremented the stack pointer, so get the
4160 offset -= (HOST_WIDE_INT) rounded_size;
4162 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4163 gen_int_mode (offset, Pmode));
4167 if (STACK_GROWS_DOWNWARD)
4168 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4169 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4170 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
4173 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4174 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
4175 gen_int_mode (rounded_size, Pmode));
4177 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4180 dest = gen_rtx_MEM (mode, dest_addr);
4184 set_mem_attributes (dest, type, 1);
4186 if (cfun->tail_call_marked)
4187 /* Function incoming arguments may overlap with sibling call
4188 outgoing arguments and we cannot allow reordering of reads
4189 from function arguments with stores to outgoing arguments
4190 of sibling calls. */
4191 set_mem_alias_set (dest, 0);
4193 emit_move_insn (dest, x);
4196 /* Emit and annotate a single push insn. */
4199 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4201 int delta, old_delta = stack_pointer_delta;
4202 rtx_insn *prev = get_last_insn ();
4205 emit_single_push_insn_1 (mode, x, type);
4207 last = get_last_insn ();
4209 /* Notice the common case where we emitted exactly one insn. */
4210 if (PREV_INSN (last) == prev)
4212 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
4216 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4217 gcc_assert (delta == INT_MIN || delta == old_delta);
4221 /* If reading SIZE bytes from X will end up reading from
4222 Y return the number of bytes that overlap. Return -1
4223 if there is no overlap or -2 if we can't determine
4224 (for example when X and Y have different base registers). */
4227 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4229 rtx tmp = plus_constant (Pmode, x, size);
4230 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4232 if (!CONST_INT_P (sub))
4235 HOST_WIDE_INT val = INTVAL (sub);
4237 return IN_RANGE (val, 1, size) ? val : -1;
4240 /* Generate code to push X onto the stack, assuming it has mode MODE and
4242 MODE is redundant except when X is a CONST_INT (since they don't
4244 SIZE is an rtx for the size of data to be copied (in bytes),
4245 needed only if X is BLKmode.
4246 Return true if successful. May return false if asked to push a
4247 partial argument during a sibcall optimization (as specified by
4248 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4251 ALIGN (in bits) is maximum alignment we can assume.
4253 If PARTIAL and REG are both nonzero, then copy that many of the first
4254 bytes of X into registers starting with REG, and push the rest of X.
4255 The amount of space pushed is decreased by PARTIAL bytes.
4256 REG must be a hard register in this case.
4257 If REG is zero but PARTIAL is not, take any all others actions for an
4258 argument partially in registers, but do not actually load any
4261 EXTRA is the amount in bytes of extra space to leave next to this arg.
4262 This is ignored if an argument block has already been allocated.
4264 On a machine that lacks real push insns, ARGS_ADDR is the address of
4265 the bottom of the argument block for this call. We use indexing off there
4266 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4267 argument block has not been preallocated.
4269 ARGS_SO_FAR is the size of args previously pushed for this call.
4271 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4272 for arguments passed in registers. If nonzero, it will be the number
4273 of bytes required. */
4276 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4277 unsigned int align, int partial, rtx reg, int extra,
4278 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4279 rtx alignment_pad, bool sibcall_p)
4282 pad_direction stack_direction
4283 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD;
4285 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4286 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4287 Default is below for small data on big-endian machines; else above. */
4288 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);
4290 /* Invert direction if stack is post-decrement.
4292 if (STACK_PUSH_CODE == POST_DEC)
4293 if (where_pad != PAD_NONE)
4294 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);
4298 int nregs = partial / UNITS_PER_WORD;
4299 rtx *tmp_regs = NULL;
4300 int overlapping = 0;
4303 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4305 /* Copy a block into the stack, entirely or partially. */
4312 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4313 used = partial - offset;
4315 if (mode != BLKmode)
4317 /* A value is to be stored in an insufficiently aligned
4318 stack slot; copy via a suitably aligned slot if
4320 size = GEN_INT (GET_MODE_SIZE (mode));
4321 if (!MEM_P (xinner))
4323 temp = assign_temp (type, 1, 1);
4324 emit_move_insn (temp, xinner);
4331 /* USED is now the # of bytes we need not copy to the stack
4332 because registers will take care of them. */
4335 xinner = adjust_address (xinner, BLKmode, used);
4337 /* If the partial register-part of the arg counts in its stack size,
4338 skip the part of stack space corresponding to the registers.
4339 Otherwise, start copying to the beginning of the stack space,
4340 by setting SKIP to 0. */
4341 skip = (reg_parm_stack_space == 0) ? 0 : used;
4343 #ifdef PUSH_ROUNDING
4344 /* Do it with several push insns if that doesn't take lots of insns
4345 and if there is no difficulty with push insns that skip bytes
4346 on the stack for alignment purposes. */
4349 && CONST_INT_P (size)
4351 && MEM_ALIGN (xinner) >= align
4352 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4353 /* Here we avoid the case of a structure whose weak alignment
4354 forces many pushes of a small amount of data,
4355 and such small pushes do rounding that causes trouble. */
4356 && ((!targetm.slow_unaligned_access (word_mode, align))
4357 || align >= BIGGEST_ALIGNMENT
4358 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4359 == (align / BITS_PER_UNIT)))
4360 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4362 /* Push padding now if padding above and stack grows down,
4363 or if padding below and stack grows up.
4364 But if space already allocated, this has already been done. */
4365 if (extra && args_addr == 0
4366 && where_pad != PAD_NONE && where_pad != stack_direction)
4367 anti_adjust_stack (GEN_INT (extra));
4369 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4372 #endif /* PUSH_ROUNDING */
4376 /* Otherwise make space on the stack and copy the data
4377 to the address of that space. */
4379 /* Deduct words put into registers from the size we must copy. */
4382 if (CONST_INT_P (size))
4383 size = GEN_INT (INTVAL (size) - used);
4385 size = expand_binop (GET_MODE (size), sub_optab, size,
4386 gen_int_mode (used, GET_MODE (size)),
4387 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4390 /* Get the address of the stack space.
4391 In this case, we do not deal with EXTRA separately.
4392 A single stack adjust will do. */
4395 temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
4398 else if (CONST_INT_P (args_so_far))
4399 temp = memory_address (BLKmode,
4400 plus_constant (Pmode, args_addr,
4401 skip + INTVAL (args_so_far)));
4403 temp = memory_address (BLKmode,
4404 plus_constant (Pmode,
4405 gen_rtx_PLUS (Pmode,
4410 if (!ACCUMULATE_OUTGOING_ARGS)
4412 /* If the source is referenced relative to the stack pointer,
4413 copy it to another register to stabilize it. We do not need
4414 to do this if we know that we won't be changing sp. */
4416 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4417 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4418 temp = copy_to_reg (temp);
4421 target = gen_rtx_MEM (BLKmode, temp);
4423 /* We do *not* set_mem_attributes here, because incoming arguments
4424 may overlap with sibling call outgoing arguments and we cannot
4425 allow reordering of reads from function arguments with stores
4426 to outgoing arguments of sibling calls. We do, however, want
4427 to record the alignment of the stack slot. */
4428 /* ALIGN may well be better aligned than TYPE, e.g. due to
4429 PARM_BOUNDARY. Assume the caller isn't lying. */
4430 set_mem_align (target, align);
4432 /* If part should go in registers and pushing to that part would
4433 overwrite some of the values that need to go into regs, load the
4434 overlapping values into temporary pseudos to be moved into the hard
4435 regs at the end after the stack pushing has completed.
4436 We cannot load them directly into the hard regs here because
4437 they can be clobbered by the block move expansions.
4440 if (partial > 0 && reg != 0 && mode == BLKmode
4441 && GET_CODE (reg) != PARALLEL)
4443 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4444 if (overlapping > 0)
4446 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4447 overlapping /= UNITS_PER_WORD;
4449 tmp_regs = XALLOCAVEC (rtx, overlapping);
4451 for (int i = 0; i < overlapping; i++)
4452 tmp_regs[i] = gen_reg_rtx (word_mode);
4454 for (int i = 0; i < overlapping; i++)
4455 emit_move_insn (tmp_regs[i],
4456 operand_subword_force (target, i, mode));
4458 else if (overlapping == -1)
4460 /* Could not determine whether there is overlap.
4461 Fail the sibcall. */
4469 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4472 else if (partial > 0)
4474 /* Scalar partly in registers. */
4476 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4479 /* # bytes of start of argument
4480 that we must make space for but need not store. */
4481 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4482 int args_offset = INTVAL (args_so_far);
4485 /* Push padding now if padding above and stack grows down,
4486 or if padding below and stack grows up.
4487 But if space already allocated, this has already been done. */
4488 if (extra && args_addr == 0
4489 && where_pad != PAD_NONE && where_pad != stack_direction)
4490 anti_adjust_stack (GEN_INT (extra));
4492 /* If we make space by pushing it, we might as well push
4493 the real data. Otherwise, we can leave OFFSET nonzero
4494 and leave the space uninitialized. */
4498 /* Now NOT_STACK gets the number of words that we don't need to
4499 allocate on the stack. Convert OFFSET to words too. */
4500 not_stack = (partial - offset) / UNITS_PER_WORD;
4501 offset /= UNITS_PER_WORD;
4503 /* If the partial register-part of the arg counts in its stack size,
4504 skip the part of stack space corresponding to the registers.
4505 Otherwise, start copying to the beginning of the stack space,
4506 by setting SKIP to 0. */
4507 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4509 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4510 x = validize_mem (force_const_mem (mode, x));
4512 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4513 SUBREGs of such registers are not allowed. */
4514 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4515 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4516 x = copy_to_reg (x);
4518 /* Loop over all the words allocated on the stack for this arg. */
4519 /* We can do it by words, because any scalar bigger than a word
4520 has a size a multiple of a word. */
4521 for (i = size - 1; i >= not_stack; i--)
4522 if (i >= not_stack + offset)
4523 if (!emit_push_insn (operand_subword_force (x, i, mode),
4524 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4526 GEN_INT (args_offset + ((i - not_stack + skip)
4528 reg_parm_stack_space, alignment_pad, sibcall_p))
4536 /* Push padding now if padding above and stack grows down,
4537 or if padding below and stack grows up.
4538 But if space already allocated, this has already been done. */
4539 if (extra && args_addr == 0
4540 && where_pad != PAD_NONE && where_pad != stack_direction)
4541 anti_adjust_stack (GEN_INT (extra));
4543 #ifdef PUSH_ROUNDING
4544 if (args_addr == 0 && PUSH_ARGS)
4545 emit_single_push_insn (mode, x, type);
4549 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far);
4550 dest = gen_rtx_MEM (mode, memory_address (mode, addr));
4552 /* We do *not* set_mem_attributes here, because incoming arguments
4553 may overlap with sibling call outgoing arguments and we cannot
4554 allow reordering of reads from function arguments with stores
4555 to outgoing arguments of sibling calls. We do, however, want
4556 to record the alignment of the stack slot. */
4557 /* ALIGN may well be better aligned than TYPE, e.g. due to
4558 PARM_BOUNDARY. Assume the caller isn't lying. */
4559 set_mem_align (dest, align);
4561 emit_move_insn (dest, x);
4565 /* Move the partial arguments into the registers and any overlapping
4566 values that we moved into the pseudos in tmp_regs. */
4567 if (partial > 0 && reg != 0)
4569 /* Handle calls that pass values in multiple non-contiguous locations.
4570 The Irix 6 ABI has examples of this. */
4571 if (GET_CODE (reg) == PARALLEL)
4572 emit_group_load (reg, x, type, -1);
4575 gcc_assert (partial % UNITS_PER_WORD == 0);
4576 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4578 for (int i = 0; i < overlapping; i++)
4579 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4580 + nregs - overlapping + i),
4586 if (extra && args_addr == 0 && where_pad == stack_direction)
4587 anti_adjust_stack (GEN_INT (extra));
4589 if (alignment_pad && args_addr == 0)
4590 anti_adjust_stack (alignment_pad);
4595 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4599 get_subtarget (rtx x)
4603 /* Only registers can be subtargets. */
4605 /* Don't use hard regs to avoid extending their life. */
4606 || REGNO (x) < FIRST_PSEUDO_REGISTER
4610 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4611 FIELD is a bitfield. Returns true if the optimization was successful,
4612 and there's nothing else to do. */
4615 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4616 unsigned HOST_WIDE_INT bitpos,
4617 unsigned HOST_WIDE_INT bitregion_start,
4618 unsigned HOST_WIDE_INT bitregion_end,
4619 machine_mode mode1, rtx str_rtx,
4620 tree to, tree src, bool reverse)
4622 machine_mode str_mode = GET_MODE (str_rtx);
4623 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4628 enum tree_code code;
4630 if (mode1 != VOIDmode
4631 || bitsize >= BITS_PER_WORD
4632 || str_bitsize > BITS_PER_WORD
4633 || TREE_SIDE_EFFECTS (to)
4634 || TREE_THIS_VOLATILE (to))
4638 if (TREE_CODE (src) != SSA_NAME)
4640 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4643 srcstmt = get_gimple_for_ssa_name (src);
4645 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4648 code = gimple_assign_rhs_code (srcstmt);
4650 op0 = gimple_assign_rhs1 (srcstmt);
4652 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4653 to find its initialization. Hopefully the initialization will
4654 be from a bitfield load. */
4655 if (TREE_CODE (op0) == SSA_NAME)
4657 gimple *op0stmt = get_gimple_for_ssa_name (op0);
4659 /* We want to eventually have OP0 be the same as TO, which
4660 should be a bitfield. */
4662 || !is_gimple_assign (op0stmt)
4663 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4665 op0 = gimple_assign_rhs1 (op0stmt);
4668 op1 = gimple_assign_rhs2 (srcstmt);
4670 if (!operand_equal_p (to, op0, 0))
4673 if (MEM_P (str_rtx))
4675 unsigned HOST_WIDE_INT offset1;
4677 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4678 str_bitsize = BITS_PER_WORD;
4680 scalar_int_mode best_mode;
4681 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
4682 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode))
4684 str_mode = best_mode;
4685 str_bitsize = GET_MODE_BITSIZE (best_mode);
4688 bitpos %= str_bitsize;
4689 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4690 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4692 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4695 gcc_assert (!reverse);
4697 /* If the bit field covers the whole REG/MEM, store_field
4698 will likely generate better code. */
4699 if (bitsize >= str_bitsize)
4702 /* We can't handle fields split across multiple entities. */
4703 if (bitpos + bitsize > str_bitsize)
4706 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
4707 bitpos = str_bitsize - bitpos - bitsize;
4713 /* For now, just optimize the case of the topmost bitfield
4714 where we don't need to do any masking and also
4715 1 bit bitfields where xor can be used.
4716 We might win by one instruction for the other bitfields
4717 too if insv/extv instructions aren't used, so that
4718 can be added later. */
4719 if ((reverse || bitpos + bitsize != str_bitsize)
4720 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4723 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4724 value = convert_modes (str_mode,
4725 TYPE_MODE (TREE_TYPE (op1)), value,
4726 TYPE_UNSIGNED (TREE_TYPE (op1)));
4728 /* We may be accessing data outside the field, which means
4729 we can alias adjacent data. */
4730 if (MEM_P (str_rtx))
4732 str_rtx = shallow_copy_rtx (str_rtx);
4733 set_mem_alias_set (str_rtx, 0);
4734 set_mem_expr (str_rtx, 0);
4737 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize))
4739 value = expand_and (str_mode, value, const1_rtx, NULL);
4743 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4745 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4747 value = flip_storage_order (str_mode, value);
4748 result = expand_binop (str_mode, binop, str_rtx,
4749 value, str_rtx, 1, OPTAB_WIDEN);
4750 if (result != str_rtx)
4751 emit_move_insn (str_rtx, result);
4756 if (TREE_CODE (op1) != INTEGER_CST)
4758 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4759 value = convert_modes (str_mode,
4760 TYPE_MODE (TREE_TYPE (op1)), value,
4761 TYPE_UNSIGNED (TREE_TYPE (op1)));
4763 /* We may be accessing data outside the field, which means
4764 we can alias adjacent data. */
4765 if (MEM_P (str_rtx))
4767 str_rtx = shallow_copy_rtx (str_rtx);
4768 set_mem_alias_set (str_rtx, 0);
4769 set_mem_expr (str_rtx, 0);
4772 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4773 if (bitpos + bitsize != str_bitsize)
4775 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1,
4777 value = expand_and (str_mode, value, mask, NULL_RTX);
4779 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4781 value = flip_storage_order (str_mode, value);
4782 result = expand_binop (str_mode, binop, str_rtx,
4783 value, str_rtx, 1, OPTAB_WIDEN);
4784 if (result != str_rtx)
4785 emit_move_insn (str_rtx, result);
4795 /* In the C++ memory model, consecutive bit fields in a structure are
4796 considered one memory location.
4798 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4799 returns the bit range of consecutive bits in which this COMPONENT_REF
4800 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4801 and *OFFSET may be adjusted in the process.
4803 If the access does not need to be restricted, 0 is returned in both
4804 *BITSTART and *BITEND. */
4807 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4808 unsigned HOST_WIDE_INT *bitend,
4810 HOST_WIDE_INT *bitpos,
4813 HOST_WIDE_INT bitoffset;
4816 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4818 field = TREE_OPERAND (exp, 1);
4819 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4820 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4821 need to limit the range we can access. */
4824 *bitstart = *bitend = 0;
4828 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4829 part of a larger bit field, then the representative does not serve any
4830 useful purpose. This can occur in Ada. */
4831 if (handled_component_p (TREE_OPERAND (exp, 0)))
4834 HOST_WIDE_INT rbitsize, rbitpos;
4836 int unsignedp, reversep, volatilep = 0;
4837 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4838 &roffset, &rmode, &unsignedp, &reversep,
4840 if ((rbitpos % BITS_PER_UNIT) != 0)
4842 *bitstart = *bitend = 0;
4847 /* Compute the adjustment to bitpos from the offset of the field
4848 relative to the representative. DECL_FIELD_OFFSET of field and
4849 repr are the same by construction if they are not constants,
4850 see finish_bitfield_layout. */
4851 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field))
4852 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr)))
4853 bitoffset = (tree_to_uhwi (DECL_FIELD_OFFSET (field))
4854 - tree_to_uhwi (DECL_FIELD_OFFSET (repr))) * BITS_PER_UNIT;
4857 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4858 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4860 /* If the adjustment is larger than bitpos, we would have a negative bit
4861 position for the lower bound and this may wreak havoc later. Adjust
4862 offset and bitpos to make the lower bound non-negative in that case. */
4863 if (bitoffset > *bitpos)
4865 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4866 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4869 if (*offset == NULL_TREE)
4870 *offset = size_int (-adjust / BITS_PER_UNIT);
4873 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4877 *bitstart = *bitpos - bitoffset;
4879 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4882 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4883 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4884 DECL_RTL was not set yet, return NORTL. */
4887 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4889 if (TREE_CODE (addr) != ADDR_EXPR)
4892 tree base = TREE_OPERAND (addr, 0);
4895 || TREE_ADDRESSABLE (base)
4896 || DECL_MODE (base) == BLKmode)
4899 if (!DECL_RTL_SET_P (base))
4902 return (!MEM_P (DECL_RTL (base)));
4905 /* Returns true if the MEM_REF REF refers to an object that does not
4906 reside in memory and has non-BLKmode. */
4909 mem_ref_refers_to_non_mem_p (tree ref)
4911 tree base = TREE_OPERAND (ref, 0);
4912 return addr_expr_of_non_mem_decl_p_1 (base, false);
4915 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4916 is true, try generating a nontemporal store. */
4919 expand_assignment (tree to, tree from, bool nontemporal)
4925 enum insn_code icode;
4927 /* Don't crash if the lhs of the assignment was erroneous. */
4928 if (TREE_CODE (to) == ERROR_MARK)
4930 expand_normal (from);
4934 /* Optimize away no-op moves without side-effects. */
4935 if (operand_equal_p (to, from, 0))
4938 /* Handle misaligned stores. */
4939 mode = TYPE_MODE (TREE_TYPE (to));
4940 if ((TREE_CODE (to) == MEM_REF
4941 || TREE_CODE (to) == TARGET_MEM_REF)
4943 && !mem_ref_refers_to_non_mem_p (to)
4944 && ((align = get_object_alignment (to))
4945 < GET_MODE_ALIGNMENT (mode))
4946 && (((icode = optab_handler (movmisalign_optab, mode))
4947 != CODE_FOR_nothing)
4948 || targetm.slow_unaligned_access (mode, align)))
4952 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4953 reg = force_not_mem (reg);
4954 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4955 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to))
4956 reg = flip_storage_order (mode, reg);
4958 if (icode != CODE_FOR_nothing)
4960 struct expand_operand ops[2];
4962 create_fixed_operand (&ops[0], mem);
4963 create_input_operand (&ops[1], reg, mode);
4964 /* The movmisalign<mode> pattern cannot fail, else the assignment
4965 would silently be omitted. */
4966 expand_insn (icode, 2, ops);
4969 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg,
4974 /* Assignment of a structure component needs special treatment
4975 if the structure component's rtx is not simply a MEM.
4976 Assignment of an array element at a constant index, and assignment of
4977 an array element in an unaligned packed structure field, has the same
4978 problem. Same for (partially) storing into a non-memory object. */
4979 if (handled_component_p (to)
4980 || (TREE_CODE (to) == MEM_REF
4981 && (REF_REVERSE_STORAGE_ORDER (to)
4982 || mem_ref_refers_to_non_mem_p (to)))
4983 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4986 HOST_WIDE_INT bitsize, bitpos;
4987 unsigned HOST_WIDE_INT bitregion_start = 0;
4988 unsigned HOST_WIDE_INT bitregion_end = 0;
4990 int unsignedp, reversep, volatilep = 0;
4994 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4995 &unsignedp, &reversep, &volatilep);
4997 /* Make sure bitpos is not negative, it can wreak havoc later. */
5000 gcc_assert (offset == NULL_TREE);
5001 offset = size_int (bitpos >> LOG2_BITS_PER_UNIT);
5002 bitpos &= BITS_PER_UNIT - 1;
5005 if (TREE_CODE (to) == COMPONENT_REF
5006 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
5007 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
5008 /* The C++ memory model naturally applies to byte-aligned fields.
5009 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5010 BITSIZE are not byte-aligned, there is no need to limit the range
5011 we can access. This can occur with packed structures in Ada. */
5012 else if (bitsize > 0
5013 && bitsize % BITS_PER_UNIT == 0
5014 && bitpos % BITS_PER_UNIT == 0)
5016 bitregion_start = bitpos;
5017 bitregion_end = bitpos + bitsize - 1;
5020 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
5022 /* If the field has a mode, we want to access it in the
5023 field's mode, not the computed mode.
5024 If a MEM has VOIDmode (external with incomplete type),
5025 use BLKmode for it instead. */
5028 if (mode1 != VOIDmode)
5029 to_rtx = adjust_address (to_rtx, mode1, 0);
5030 else if (GET_MODE (to_rtx) == VOIDmode)
5031 to_rtx = adjust_address (to_rtx, BLKmode, 0);
5036 machine_mode address_mode;
5039 if (!MEM_P (to_rtx))
5041 /* We can get constant negative offsets into arrays with broken
5042 user code. Translate this to a trap instead of ICEing. */
5043 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
5044 expand_builtin_trap ();
5045 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
5048 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
5049 address_mode = get_address_mode (to_rtx);
5050 if (GET_MODE (offset_rtx) != address_mode)
5052 /* We cannot be sure that the RTL in offset_rtx is valid outside
5053 of a memory address context, so force it into a register
5054 before attempting to convert it to the desired mode. */
5055 offset_rtx = force_operand (offset_rtx, NULL_RTX);
5056 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5059 /* If we have an expression in OFFSET_RTX and a non-zero
5060 byte offset in BITPOS, adding the byte offset before the
5061 OFFSET_RTX results in better intermediate code, which makes
5062 later rtl optimization passes perform better.
5064 We prefer intermediate code like this:
5066 r124:DI=r123:DI+0x18
5071 r124:DI=r123:DI+0x10
5072 [r124:DI+0x8]=r121:DI
5074 This is only done for aligned data values, as these can
5075 be expected to result in single move instructions. */
5076 if (mode1 != VOIDmode
5079 && (bitpos % bitsize) == 0
5080 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
5081 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
5083 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
5084 bitregion_start = 0;
5085 if (bitregion_end >= (unsigned HOST_WIDE_INT) bitpos)
5086 bitregion_end -= bitpos;
5090 to_rtx = offset_address (to_rtx, offset_rtx,
5091 highest_pow2_factor_for_target (to,
5095 /* No action is needed if the target is not a memory and the field
5096 lies completely outside that target. This can occur if the source
5097 code contains an out-of-bounds access to a small array. */
5099 && GET_MODE (to_rtx) != BLKmode
5100 && (unsigned HOST_WIDE_INT) bitpos
5101 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
5103 expand_normal (from);
5106 /* Handle expand_expr of a complex value returning a CONCAT. */
5107 else if (GET_CODE (to_rtx) == CONCAT)
5109 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
5110 if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE (to_rtx)
5111 && COMPLEX_MODE_P (GET_MODE (to_rtx))
5113 && bitsize == mode_bitsize)
5114 result = store_expr (from, to_rtx, false, nontemporal, reversep);
5115 else if (bitsize == mode_bitsize / 2
5116 && (bitpos == 0 || bitpos == mode_bitsize / 2))
5117 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
5118 nontemporal, reversep);
5119 else if (bitpos + bitsize <= mode_bitsize / 2)
5120 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5121 bitregion_start, bitregion_end,
5122 mode1, from, get_alias_set (to),
5123 nontemporal, reversep);
5124 else if (bitpos >= mode_bitsize / 2)
5125 result = store_field (XEXP (to_rtx, 1), bitsize,
5126 bitpos - mode_bitsize / 2,
5127 bitregion_start, bitregion_end,
5128 mode1, from, get_alias_set (to),
5129 nontemporal, reversep);
5130 else if (bitpos == 0 && bitsize == mode_bitsize)
5132 result = expand_normal (from);
5133 if (GET_CODE (result) == CONCAT)
5135 machine_mode to_mode = GET_MODE_INNER (GET_MODE (to_rtx));
5136 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result));
5138 = simplify_gen_subreg (to_mode, XEXP (result, 0),
5141 = simplify_gen_subreg (to_mode, XEXP (result, 1),
5143 emit_move_insn (XEXP (to_rtx, 0), from_real);
5144 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5149 = simplify_gen_subreg (GET_MODE (to_rtx), result,
5150 TYPE_MODE (TREE_TYPE (from)), 0);
5151 emit_move_insn (XEXP (to_rtx, 0),
5152 read_complex_part (from_rtx, false));
5153 emit_move_insn (XEXP (to_rtx, 1),
5154 read_complex_part (from_rtx, true));
5159 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5160 GET_MODE_SIZE (GET_MODE (to_rtx)));
5161 write_complex_part (temp, XEXP (to_rtx, 0), false);
5162 write_complex_part (temp, XEXP (to_rtx, 1), true);
5163 result = store_field (temp, bitsize, bitpos,
5164 bitregion_start, bitregion_end,
5165 mode1, from, get_alias_set (to),
5166 nontemporal, reversep);
5167 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5168 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5175 /* If the field is at offset zero, we could have been given the
5176 DECL_RTX of the parent struct. Don't munge it. */
5177 to_rtx = shallow_copy_rtx (to_rtx);
5178 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5180 MEM_VOLATILE_P (to_rtx) = 1;
5183 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5184 bitregion_start, bitregion_end,
5185 mode1, to_rtx, to, from,
5189 result = store_field (to_rtx, bitsize, bitpos,
5190 bitregion_start, bitregion_end,
5191 mode1, from, get_alias_set (to),
5192 nontemporal, reversep);
5196 preserve_temp_slots (result);
5201 /* If the rhs is a function call and its value is not an aggregate,
5202 call the function before we start to compute the lhs.
5203 This is needed for correct code for cases such as
5204 val = setjmp (buf) on machines where reference to val
5205 requires loading up part of an address in a separate insn.
5207 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5208 since it might be a promoted variable where the zero- or sign- extension
5209 needs to be done. Handling this in the normal way is safe because no
5210 computation is done before the call. The same is true for SSA names. */
5211 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5212 && COMPLETE_TYPE_P (TREE_TYPE (from))
5213 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5215 || TREE_CODE (to) == PARM_DECL
5216 || TREE_CODE (to) == RESULT_DECL)
5217 && REG_P (DECL_RTL (to)))
5218 || TREE_CODE (to) == SSA_NAME))
5224 value = expand_normal (from);
5226 /* Split value and bounds to store them separately. */
5227 chkp_split_slot (value, &value, &bounds);
5230 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5232 /* Handle calls that return values in multiple non-contiguous locations.
5233 The Irix 6 ABI has examples of this. */
5234 if (GET_CODE (to_rtx) == PARALLEL)
5236 if (GET_CODE (value) == PARALLEL)
5237 emit_group_move (to_rtx, value);
5239 emit_group_load (to_rtx, value, TREE_TYPE (from),
5240 int_size_in_bytes (TREE_TYPE (from)));
5242 else if (GET_CODE (value) == PARALLEL)
5243 emit_group_store (to_rtx, value, TREE_TYPE (from),
5244 int_size_in_bytes (TREE_TYPE (from)));
5245 else if (GET_MODE (to_rtx) == BLKmode)
5247 /* Handle calls that return BLKmode values in registers. */
5249 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5251 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5255 if (POINTER_TYPE_P (TREE_TYPE (to)))
5256 value = convert_memory_address_addr_space
5257 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value,
5258 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5260 emit_move_insn (to_rtx, value);
5263 /* Store bounds if required. */
5265 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5267 gcc_assert (MEM_P (to_rtx));
5268 chkp_emit_bounds_store (bounds, value, to_rtx);
5271 preserve_temp_slots (to_rtx);
5276 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5277 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5279 /* Don't move directly into a return register. */
5280 if (TREE_CODE (to) == RESULT_DECL
5281 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5287 /* If the source is itself a return value, it still is in a pseudo at
5288 this point so we can move it back to the return register directly. */
5290 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5291 && TREE_CODE (from) != CALL_EXPR)
5292 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5294 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5296 /* Handle calls that return values in multiple non-contiguous locations.
5297 The Irix 6 ABI has examples of this. */
5298 if (GET_CODE (to_rtx) == PARALLEL)
5300 if (GET_CODE (temp) == PARALLEL)
5301 emit_group_move (to_rtx, temp);
5303 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5304 int_size_in_bytes (TREE_TYPE (from)));
5307 emit_move_insn (to_rtx, temp);
5309 preserve_temp_slots (to_rtx);
5314 /* In case we are returning the contents of an object which overlaps
5315 the place the value is being stored, use a safe function when copying
5316 a value through a pointer into a structure value return block. */
5317 if (TREE_CODE (to) == RESULT_DECL
5318 && TREE_CODE (from) == INDIRECT_REF
5319 && ADDR_SPACE_GENERIC_P
5320 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5321 && refs_may_alias_p (to, from)
5322 && cfun->returns_struct
5323 && !cfun->returns_pcc_struct)
5328 size = expr_size (from);
5329 from_rtx = expand_normal (from);
5331 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size);
5333 preserve_temp_slots (to_rtx);
5338 /* Compute FROM and store the value in the rtx we got. */
5341 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, false, to);
5342 preserve_temp_slots (result);
5347 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5348 succeeded, false otherwise. */
5351 emit_storent_insn (rtx to, rtx from)
5353 struct expand_operand ops[2];
5354 machine_mode mode = GET_MODE (to);
5355 enum insn_code code = optab_handler (storent_optab, mode);
5357 if (code == CODE_FOR_nothing)
5360 create_fixed_operand (&ops[0], to);
5361 create_input_operand (&ops[1], from, mode);
5362 return maybe_expand_insn (code, 2, ops);
5365 /* Generate code for computing expression EXP,
5366 and storing the value into TARGET.
5368 If the mode is BLKmode then we may return TARGET itself.
5369 It turns out that in BLKmode it doesn't cause a problem.
5370 because C has no operators that could combine two different
5371 assignments into the same BLKmode object with different values
5372 with no sequence point. Will other languages need this to
5375 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5376 stack, and block moves may need to be treated specially.
5378 If NONTEMPORAL is true, try using a nontemporal store instruction.
5380 If REVERSE is true, the store is to be done in reverse order.
5382 If BTARGET is not NULL then computed bounds of EXP are
5383 associated with BTARGET. */
5386 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5387 bool nontemporal, bool reverse, tree btarget)
5390 rtx alt_rtl = NULL_RTX;
5391 location_t loc = curr_insn_location ();
5393 if (VOID_TYPE_P (TREE_TYPE (exp)))
5395 /* C++ can generate ?: expressions with a throw expression in one
5396 branch and an rvalue in the other. Here, we resolve attempts to
5397 store the throw expression's nonexistent result. */
5398 gcc_assert (!call_param_p);
5399 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5402 if (TREE_CODE (exp) == COMPOUND_EXPR)
5404 /* Perform first part of compound expression, then assign from second
5406 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5407 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5408 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5409 call_param_p, nontemporal, reverse,
5412 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5414 /* For conditional expression, get safe form of the target. Then
5415 test the condition, doing the appropriate assignment on either
5416 side. This avoids the creation of unnecessary temporaries.
5417 For non-BLKmode, it is more efficient not to do this. */
5419 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5421 do_pending_stack_adjust ();
5423 jumpifnot (TREE_OPERAND (exp, 0), lab1,
5424 profile_probability::uninitialized ());
5425 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5426 nontemporal, reverse, btarget);
5427 emit_jump_insn (targetm.gen_jump (lab2));
5430 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5431 nontemporal, reverse, btarget);
5437 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5438 /* If this is a scalar in a register that is stored in a wider mode
5439 than the declared mode, compute the result into its declared mode
5440 and then convert to the wider mode. Our value is the computed
5443 rtx inner_target = 0;
5444 scalar_int_mode outer_mode = subreg_unpromoted_mode (target);
5445 scalar_int_mode inner_mode = subreg_promoted_mode (target);
5447 /* We can do the conversion inside EXP, which will often result
5448 in some optimizations. Do the conversion in two steps: first
5449 change the signedness, if needed, then the extend. But don't
5450 do this if the type of EXP is a subtype of something else
5451 since then the conversion might involve more than just
5452 converting modes. */
5453 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5454 && TREE_TYPE (TREE_TYPE (exp)) == 0
5455 && GET_MODE_PRECISION (outer_mode)
5456 == TYPE_PRECISION (TREE_TYPE (exp)))
5458 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5459 TYPE_UNSIGNED (TREE_TYPE (exp))))
5461 /* Some types, e.g. Fortran's logical*4, won't have a signed
5462 version, so use the mode instead. */
5464 = (signed_or_unsigned_type_for
5465 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5467 ntype = lang_hooks.types.type_for_mode
5468 (TYPE_MODE (TREE_TYPE (exp)),
5469 SUBREG_PROMOTED_SIGN (target));
5471 exp = fold_convert_loc (loc, ntype, exp);
5474 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5475 (inner_mode, SUBREG_PROMOTED_SIGN (target)),
5478 inner_target = SUBREG_REG (target);
5481 temp = expand_expr (exp, inner_target, VOIDmode,
5482 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5484 /* Handle bounds returned by call. */
5485 if (TREE_CODE (exp) == CALL_EXPR)
5488 chkp_split_slot (temp, &temp, &bounds);
5489 if (bounds && btarget)
5491 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5492 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5493 chkp_set_rtl_bounds (btarget, tmp);
5497 /* If TEMP is a VOIDmode constant, use convert_modes to make
5498 sure that we properly convert it. */
5499 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5501 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)),
5502 temp, SUBREG_PROMOTED_SIGN (target));
5503 temp = convert_modes (inner_mode, outer_mode, temp,
5504 SUBREG_PROMOTED_SIGN (target));
5507 convert_move (SUBREG_REG (target), temp,
5508 SUBREG_PROMOTED_SIGN (target));
5512 else if ((TREE_CODE (exp) == STRING_CST
5513 || (TREE_CODE (exp) == MEM_REF
5514 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5515 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5517 && integer_zerop (TREE_OPERAND (exp, 1))))
5518 && !nontemporal && !call_param_p
5521 /* Optimize initialization of an array with a STRING_CST. */
5522 HOST_WIDE_INT exp_len, str_copy_len;
5524 tree str = TREE_CODE (exp) == STRING_CST
5525 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5527 exp_len = int_expr_size (exp);
5531 if (TREE_STRING_LENGTH (str) <= 0)
5534 str_copy_len = strlen (TREE_STRING_POINTER (str));
5535 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5538 str_copy_len = TREE_STRING_LENGTH (str);
5539 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5540 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5542 str_copy_len += STORE_MAX_PIECES - 1;
5543 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5545 str_copy_len = MIN (str_copy_len, exp_len);
5546 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5547 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5548 MEM_ALIGN (target), false))
5553 dest_mem = store_by_pieces (dest_mem,
5554 str_copy_len, builtin_strncpy_read_str,
5556 TREE_STRING_POINTER (str)),
5557 MEM_ALIGN (target), false,
5558 exp_len > str_copy_len ? 1 : 0);
5559 if (exp_len > str_copy_len)
5560 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5561 GEN_INT (exp_len - str_copy_len),
5570 /* If we want to use a nontemporal or a reverse order store, force the
5571 value into a register first. */
5572 tmp_target = nontemporal || reverse ? NULL_RTX : target;
5573 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5575 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5578 /* Handle bounds returned by call. */
5579 if (TREE_CODE (exp) == CALL_EXPR)
5582 chkp_split_slot (temp, &temp, &bounds);
5583 if (bounds && btarget)
5585 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5586 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5587 chkp_set_rtl_bounds (btarget, tmp);
5592 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5593 the same as that of TARGET, adjust the constant. This is needed, for
5594 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5595 only a word-sized value. */
5596 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5597 && TREE_CODE (exp) != ERROR_MARK
5598 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5599 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5600 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5602 /* If value was not generated in the target, store it there.
5603 Convert the value to TARGET's type first if necessary and emit the
5604 pending incrementations that have been queued when expanding EXP.
5605 Note that we cannot emit the whole queue blindly because this will
5606 effectively disable the POST_INC optimization later.
5608 If TEMP and TARGET compare equal according to rtx_equal_p, but
5609 one or both of them are volatile memory refs, we have to distinguish
5611 - expand_expr has used TARGET. In this case, we must not generate
5612 another copy. This can be detected by TARGET being equal according
5614 - expand_expr has not used TARGET - that means that the source just
5615 happens to have the same RTX form. Since temp will have been created
5616 by expand_expr, it will compare unequal according to == .
5617 We must generate a copy in this case, to reach the correct number
5618 of volatile memory references. */
5620 if ((! rtx_equal_p (temp, target)
5621 || (temp != target && (side_effects_p (temp)
5622 || side_effects_p (target))))
5623 && TREE_CODE (exp) != ERROR_MARK
5624 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5625 but TARGET is not valid memory reference, TEMP will differ
5626 from TARGET although it is really the same location. */
5628 && rtx_equal_p (alt_rtl, target)
5629 && !side_effects_p (alt_rtl)
5630 && !side_effects_p (target))
5631 /* If there's nothing to copy, don't bother. Don't call
5632 expr_size unless necessary, because some front-ends (C++)
5633 expr_size-hook must not be given objects that are not
5634 supposed to be bit-copied or bit-initialized. */
5635 && expr_size (exp) != const0_rtx)
5637 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5639 if (GET_MODE (target) == BLKmode)
5641 /* Handle calls that return BLKmode values in registers. */
5642 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5643 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5645 store_bit_field (target,
5646 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5647 0, 0, 0, GET_MODE (temp), temp, reverse);
5650 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5653 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5655 /* Handle copying a string constant into an array. The string
5656 constant may be shorter than the array. So copy just the string's
5657 actual length, and clear the rest. First get the size of the data
5658 type of the string, which is actually the size of the target. */
5659 rtx size = expr_size (exp);
5661 if (CONST_INT_P (size)
5662 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5663 emit_block_move (target, temp, size,
5665 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5668 machine_mode pointer_mode
5669 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5670 machine_mode address_mode = get_address_mode (target);
5672 /* Compute the size of the data to copy from the string. */
5674 = size_binop_loc (loc, MIN_EXPR,
5675 make_tree (sizetype, size),
5676 size_int (TREE_STRING_LENGTH (exp)));
5678 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5680 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5681 rtx_code_label *label = 0;
5683 /* Copy that much. */
5684 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5685 TYPE_UNSIGNED (sizetype));
5686 emit_block_move (target, temp, copy_size_rtx,
5688 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5690 /* Figure out how much is left in TARGET that we have to clear.
5691 Do all calculations in pointer_mode. */
5692 if (CONST_INT_P (copy_size_rtx))
5694 size = plus_constant (address_mode, size,
5695 -INTVAL (copy_size_rtx));
5696 target = adjust_address (target, BLKmode,
5697 INTVAL (copy_size_rtx));
5701 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5702 copy_size_rtx, NULL_RTX, 0,
5705 if (GET_MODE (copy_size_rtx) != address_mode)
5706 copy_size_rtx = convert_to_mode (address_mode,
5708 TYPE_UNSIGNED (sizetype));
5710 target = offset_address (target, copy_size_rtx,
5711 highest_pow2_factor (copy_size));
5712 label = gen_label_rtx ();
5713 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5714 GET_MODE (size), 0, label);
5717 if (size != const0_rtx)
5718 clear_storage (target, size, BLOCK_OP_NORMAL);
5724 /* Handle calls that return values in multiple non-contiguous locations.
5725 The Irix 6 ABI has examples of this. */
5726 else if (GET_CODE (target) == PARALLEL)
5728 if (GET_CODE (temp) == PARALLEL)
5729 emit_group_move (target, temp);
5731 emit_group_load (target, temp, TREE_TYPE (exp),
5732 int_size_in_bytes (TREE_TYPE (exp)));
5734 else if (GET_CODE (temp) == PARALLEL)
5735 emit_group_store (target, temp, TREE_TYPE (exp),
5736 int_size_in_bytes (TREE_TYPE (exp)));
5737 else if (GET_MODE (temp) == BLKmode)
5738 emit_block_move (target, temp, expr_size (exp),
5740 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5741 /* If we emit a nontemporal store, there is nothing else to do. */
5742 else if (nontemporal && emit_storent_insn (target, temp))
5747 temp = flip_storage_order (GET_MODE (target), temp);
5748 temp = force_operand (temp, target);
5750 emit_move_insn (target, temp);
5757 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5759 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal,
5762 return store_expr_with_bounds (exp, target, call_param_p, nontemporal,
5766 /* Return true if field F of structure TYPE is a flexible array. */
5769 flexible_array_member_p (const_tree f, const_tree type)
5774 return (DECL_CHAIN (f) == NULL
5775 && TREE_CODE (tf) == ARRAY_TYPE
5777 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5778 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5779 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5780 && int_size_in_bytes (type) >= 0);
5783 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5784 must have in order for it to completely initialize a value of type TYPE.
5785 Return -1 if the number isn't known.
5787 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5789 static HOST_WIDE_INT
5790 count_type_elements (const_tree type, bool for_ctor_p)
5792 switch (TREE_CODE (type))
5798 nelts = array_type_nelts (type);
5799 if (nelts && tree_fits_uhwi_p (nelts))
5801 unsigned HOST_WIDE_INT n;
5803 n = tree_to_uhwi (nelts) + 1;
5804 if (n == 0 || for_ctor_p)
5807 return n * count_type_elements (TREE_TYPE (type), false);
5809 return for_ctor_p ? -1 : 1;
5814 unsigned HOST_WIDE_INT n;
5818 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5819 if (TREE_CODE (f) == FIELD_DECL)
5822 n += count_type_elements (TREE_TYPE (f), false);
5823 else if (!flexible_array_member_p (f, type))
5824 /* Don't count flexible arrays, which are not supposed
5825 to be initialized. */
5833 case QUAL_UNION_TYPE:
5838 gcc_assert (!for_ctor_p);
5839 /* Estimate the number of scalars in each field and pick the
5840 maximum. Other estimates would do instead; the idea is simply
5841 to make sure that the estimate is not sensitive to the ordering
5844 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5845 if (TREE_CODE (f) == FIELD_DECL)
5847 m = count_type_elements (TREE_TYPE (f), false);
5848 /* If the field doesn't span the whole union, add an extra
5849 scalar for the rest. */
5850 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5851 TYPE_SIZE (type)) != 1)
5863 return TYPE_VECTOR_SUBPARTS (type);
5867 case FIXED_POINT_TYPE:
5872 case REFERENCE_TYPE:
5888 /* Helper for categorize_ctor_elements. Identical interface. */
5891 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5892 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5894 unsigned HOST_WIDE_INT idx;
5895 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5896 tree value, purpose, elt_type;
5898 /* Whether CTOR is a valid constant initializer, in accordance with what
5899 initializer_constant_valid_p does. If inferred from the constructor
5900 elements, true until proven otherwise. */
5901 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5902 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5907 elt_type = NULL_TREE;
5909 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5911 HOST_WIDE_INT mult = 1;
5913 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5915 tree lo_index = TREE_OPERAND (purpose, 0);
5916 tree hi_index = TREE_OPERAND (purpose, 1);
5918 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
5919 mult = (tree_to_uhwi (hi_index)
5920 - tree_to_uhwi (lo_index) + 1);
5923 elt_type = TREE_TYPE (value);
5925 switch (TREE_CODE (value))
5929 HOST_WIDE_INT nz = 0, ic = 0;
5931 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5934 nz_elts += mult * nz;
5935 init_elts += mult * ic;
5937 if (const_from_elts_p && const_p)
5938 const_p = const_elt_p;
5945 if (!initializer_zerop (value))
5951 nz_elts += mult * TREE_STRING_LENGTH (value);
5952 init_elts += mult * TREE_STRING_LENGTH (value);
5956 if (!initializer_zerop (TREE_REALPART (value)))
5958 if (!initializer_zerop (TREE_IMAGPART (value)))
5966 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5968 tree v = VECTOR_CST_ELT (value, i);
5969 if (!initializer_zerop (v))
5978 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5979 nz_elts += mult * tc;
5980 init_elts += mult * tc;
5982 if (const_from_elts_p && const_p)
5984 = initializer_constant_valid_p (value,
5986 TYPE_REVERSE_STORAGE_ORDER
5994 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5995 num_fields, elt_type))
5996 *p_complete = false;
5998 *p_nz_elts += nz_elts;
5999 *p_init_elts += init_elts;
6004 /* Examine CTOR to discover:
6005 * how many scalar fields are set to nonzero values,
6006 and place it in *P_NZ_ELTS;
6007 * how many scalar fields in total are in CTOR,
6008 and place it in *P_ELT_COUNT.
6009 * whether the constructor is complete -- in the sense that every
6010 meaningful byte is explicitly given a value --
6011 and place it in *P_COMPLETE.
6013 Return whether or not CTOR is a valid static constant initializer, the same
6014 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6017 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6018 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6024 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
6027 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6028 of which had type LAST_TYPE. Each element was itself a complete
6029 initializer, in the sense that every meaningful byte was explicitly
6030 given a value. Return true if the same is true for the constructor
6034 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
6035 const_tree last_type)
6037 if (TREE_CODE (type) == UNION_TYPE
6038 || TREE_CODE (type) == QUAL_UNION_TYPE)
6043 gcc_assert (num_elts == 1 && last_type);
6045 /* ??? We could look at each element of the union, and find the
6046 largest element. Which would avoid comparing the size of the
6047 initialized element against any tail padding in the union.
6048 Doesn't seem worth the effort... */
6049 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
6052 return count_type_elements (type, true) == num_elts;
6055 /* Return 1 if EXP contains mostly (3/4) zeros. */
6058 mostly_zeros_p (const_tree exp)
6060 if (TREE_CODE (exp) == CONSTRUCTOR)
6062 HOST_WIDE_INT nz_elts, init_elts;
6065 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6066 return !complete_p || nz_elts < init_elts / 4;
6069 return initializer_zerop (exp);
6072 /* Return 1 if EXP contains all zeros. */
6075 all_zeros_p (const_tree exp)
6077 if (TREE_CODE (exp) == CONSTRUCTOR)
6079 HOST_WIDE_INT nz_elts, init_elts;
6082 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
6083 return nz_elts == 0;
6086 return initializer_zerop (exp);
6089 /* Helper function for store_constructor.
6090 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6091 CLEARED is as for store_constructor.
6092 ALIAS_SET is the alias set to use for any stores.
6093 If REVERSE is true, the store is to be done in reverse order.
6095 This provides a recursive shortcut back to store_constructor when it isn't
6096 necessary to go through store_field. This is so that we can pass through
6097 the cleared field to let store_constructor know that we may not have to
6098 clear a substructure if the outer structure has already been cleared. */
6101 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
6102 HOST_WIDE_INT bitpos,
6103 unsigned HOST_WIDE_INT bitregion_start,
6104 unsigned HOST_WIDE_INT bitregion_end,
6106 tree exp, int cleared,
6107 alias_set_type alias_set, bool reverse)
6109 if (TREE_CODE (exp) == CONSTRUCTOR
6110 /* We can only call store_constructor recursively if the size and
6111 bit position are on a byte boundary. */
6112 && bitpos % BITS_PER_UNIT == 0
6113 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
6114 /* If we have a nonzero bitpos for a register target, then we just
6115 let store_field do the bitfield handling. This is unlikely to
6116 generate unnecessary clear instructions anyways. */
6117 && (bitpos == 0 || MEM_P (target)))
6121 = adjust_address (target,
6122 GET_MODE (target) == BLKmode
6124 % GET_MODE_ALIGNMENT (GET_MODE (target)))
6125 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
6128 /* Update the alias set, if required. */
6129 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
6130 && MEM_ALIAS_SET (target) != 0)
6132 target = copy_rtx (target);
6133 set_mem_alias_set (target, alias_set);
6136 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT,
6140 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode,
6141 exp, alias_set, false, reverse);
6145 /* Returns the number of FIELD_DECLs in TYPE. */
6148 fields_length (const_tree type)
6150 tree t = TYPE_FIELDS (type);
6153 for (; t; t = DECL_CHAIN (t))
6154 if (TREE_CODE (t) == FIELD_DECL)
6161 /* Store the value of constructor EXP into the rtx TARGET.
6162 TARGET is either a REG or a MEM; we know it cannot conflict, since
6163 safe_from_p has been called.
6164 CLEARED is true if TARGET is known to have been zero'd.
6165 SIZE is the number of bytes of TARGET we are allowed to modify: this
6166 may not be the same as the size of EXP if we are assigning to a field
6167 which has been packed to exclude padding bits.
6168 If REVERSE is true, the store is to be done in reverse order. */
6171 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size,
6174 tree type = TREE_TYPE (exp);
6175 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6176 HOST_WIDE_INT bitregion_end = size > 0 ? size * BITS_PER_UNIT - 1 : 0;
6178 switch (TREE_CODE (type))
6182 case QUAL_UNION_TYPE:
6184 unsigned HOST_WIDE_INT idx;
6187 /* The storage order is specified for every aggregate type. */
6188 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6190 /* If size is zero or the target is already cleared, do nothing. */
6191 if (size == 0 || cleared)
6193 /* We either clear the aggregate or indicate the value is dead. */
6194 else if ((TREE_CODE (type) == UNION_TYPE
6195 || TREE_CODE (type) == QUAL_UNION_TYPE)
6196 && ! CONSTRUCTOR_ELTS (exp))
6197 /* If the constructor is empty, clear the union. */
6199 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6203 /* If we are building a static constructor into a register,
6204 set the initial value as zero so we can fold the value into
6205 a constant. But if more than one register is involved,
6206 this probably loses. */
6207 else if (REG_P (target) && TREE_STATIC (exp)
6208 && (GET_MODE_SIZE (GET_MODE (target))
6209 <= REGMODE_NATURAL_SIZE (GET_MODE (target))))
6211 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6215 /* If the constructor has fewer fields than the structure or
6216 if we are initializing the structure to mostly zeros, clear
6217 the whole structure first. Don't do this if TARGET is a
6218 register whose mode size isn't equal to SIZE since
6219 clear_storage can't handle this case. */
6221 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type))
6222 || mostly_zeros_p (exp))
6224 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
6227 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6231 if (REG_P (target) && !cleared)
6232 emit_clobber (target);
6234 /* Store each element of the constructor into the
6235 corresponding field of TARGET. */
6236 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6239 HOST_WIDE_INT bitsize;
6240 HOST_WIDE_INT bitpos = 0;
6242 rtx to_rtx = target;
6244 /* Just ignore missing fields. We cleared the whole
6245 structure, above, if any fields are missing. */
6249 if (cleared && initializer_zerop (value))
6252 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6253 bitsize = tree_to_uhwi (DECL_SIZE (field));
6257 mode = DECL_MODE (field);
6258 if (DECL_BIT_FIELD (field))
6261 offset = DECL_FIELD_OFFSET (field);
6262 if (tree_fits_shwi_p (offset)
6263 && tree_fits_shwi_p (bit_position (field)))
6265 bitpos = int_bit_position (field);
6271 /* If this initializes a field that is smaller than a
6272 word, at the start of a word, try to widen it to a full
6273 word. This special case allows us to output C++ member
6274 function initializations in a form that the optimizers
6276 if (WORD_REGISTER_OPERATIONS
6278 && bitsize < BITS_PER_WORD
6279 && bitpos % BITS_PER_WORD == 0
6280 && GET_MODE_CLASS (mode) == MODE_INT
6281 && TREE_CODE (value) == INTEGER_CST
6283 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6285 tree type = TREE_TYPE (value);
6287 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6289 type = lang_hooks.types.type_for_mode
6290 (word_mode, TYPE_UNSIGNED (type));
6291 value = fold_convert (type, value);
6292 /* Make sure the bits beyond the original bitsize are zero
6293 so that we can correctly avoid extra zeroing stores in
6294 later constructor elements. */
6296 = wide_int_to_tree (type, wi::mask (bitsize, false,
6298 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
6301 if (BYTES_BIG_ENDIAN)
6303 = fold_build2 (LSHIFT_EXPR, type, value,
6304 build_int_cst (type,
6305 BITS_PER_WORD - bitsize));
6306 bitsize = BITS_PER_WORD;
6310 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6311 && DECL_NONADDRESSABLE_P (field))
6313 to_rtx = copy_rtx (to_rtx);
6314 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6317 store_constructor_field (to_rtx, bitsize, bitpos,
6318 0, bitregion_end, mode,
6320 get_alias_set (TREE_TYPE (field)),
6328 unsigned HOST_WIDE_INT i;
6331 tree elttype = TREE_TYPE (type);
6333 HOST_WIDE_INT minelt = 0;
6334 HOST_WIDE_INT maxelt = 0;
6336 /* The storage order is specified for every aggregate type. */
6337 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6339 domain = TYPE_DOMAIN (type);
6340 const_bounds_p = (TYPE_MIN_VALUE (domain)
6341 && TYPE_MAX_VALUE (domain)
6342 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6343 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6345 /* If we have constant bounds for the range of the type, get them. */
6348 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6349 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6352 /* If the constructor has fewer elements than the array, clear
6353 the whole array first. Similarly if this is static
6354 constructor of a non-BLKmode object. */
6357 else if (REG_P (target) && TREE_STATIC (exp))
6361 unsigned HOST_WIDE_INT idx;
6363 HOST_WIDE_INT count = 0, zero_count = 0;
6364 need_to_clear = ! const_bounds_p;
6366 /* This loop is a more accurate version of the loop in
6367 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6368 is also needed to check for missing elements. */
6369 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6371 HOST_WIDE_INT this_node_count;
6376 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6378 tree lo_index = TREE_OPERAND (index, 0);
6379 tree hi_index = TREE_OPERAND (index, 1);
6381 if (! tree_fits_uhwi_p (lo_index)
6382 || ! tree_fits_uhwi_p (hi_index))
6388 this_node_count = (tree_to_uhwi (hi_index)
6389 - tree_to_uhwi (lo_index) + 1);
6392 this_node_count = 1;
6394 count += this_node_count;
6395 if (mostly_zeros_p (value))
6396 zero_count += this_node_count;
6399 /* Clear the entire array first if there are any missing
6400 elements, or if the incidence of zero elements is >=
6403 && (count < maxelt - minelt + 1
6404 || 4 * zero_count >= 3 * count))
6408 if (need_to_clear && size > 0)
6411 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6413 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6417 if (!cleared && REG_P (target))
6418 /* Inform later passes that the old value is dead. */
6419 emit_clobber (target);
6421 /* Store each element of the constructor into the
6422 corresponding element of TARGET, determined by counting the
6424 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6427 HOST_WIDE_INT bitsize;
6428 HOST_WIDE_INT bitpos;
6429 rtx xtarget = target;
6431 if (cleared && initializer_zerop (value))
6434 mode = TYPE_MODE (elttype);
6435 if (mode == BLKmode)
6436 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6437 ? tree_to_uhwi (TYPE_SIZE (elttype))
6440 bitsize = GET_MODE_BITSIZE (mode);
6442 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6444 tree lo_index = TREE_OPERAND (index, 0);
6445 tree hi_index = TREE_OPERAND (index, 1);
6446 rtx index_r, pos_rtx;
6447 HOST_WIDE_INT lo, hi, count;
6450 /* If the range is constant and "small", unroll the loop. */
6452 && tree_fits_shwi_p (lo_index)
6453 && tree_fits_shwi_p (hi_index)
6454 && (lo = tree_to_shwi (lo_index),
6455 hi = tree_to_shwi (hi_index),
6456 count = hi - lo + 1,
6459 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6460 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6463 lo -= minelt; hi -= minelt;
6464 for (; lo <= hi; lo++)
6466 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6469 && !MEM_KEEP_ALIAS_SET_P (target)
6470 && TREE_CODE (type) == ARRAY_TYPE
6471 && TYPE_NONALIASED_COMPONENT (type))
6473 target = copy_rtx (target);
6474 MEM_KEEP_ALIAS_SET_P (target) = 1;
6477 store_constructor_field
6478 (target, bitsize, bitpos, 0, bitregion_end,
6479 mode, value, cleared,
6480 get_alias_set (elttype), reverse);
6485 rtx_code_label *loop_start = gen_label_rtx ();
6486 rtx_code_label *loop_end = gen_label_rtx ();
6489 expand_normal (hi_index);
6491 index = build_decl (EXPR_LOCATION (exp),
6492 VAR_DECL, NULL_TREE, domain);
6493 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6494 SET_DECL_RTL (index, index_r);
6495 store_expr (lo_index, index_r, 0, false, reverse);
6497 /* Build the head of the loop. */
6498 do_pending_stack_adjust ();
6499 emit_label (loop_start);
6501 /* Assign value to element index. */
6503 fold_convert (ssizetype,
6504 fold_build2 (MINUS_EXPR,
6507 TYPE_MIN_VALUE (domain)));
6510 size_binop (MULT_EXPR, position,
6511 fold_convert (ssizetype,
6512 TYPE_SIZE_UNIT (elttype)));
6514 pos_rtx = expand_normal (position);
6515 xtarget = offset_address (target, pos_rtx,
6516 highest_pow2_factor (position));
6517 xtarget = adjust_address (xtarget, mode, 0);
6518 if (TREE_CODE (value) == CONSTRUCTOR)
6519 store_constructor (value, xtarget, cleared,
6520 bitsize / BITS_PER_UNIT, reverse);
6522 store_expr (value, xtarget, 0, false, reverse);
6524 /* Generate a conditional jump to exit the loop. */
6525 exit_cond = build2 (LT_EXPR, integer_type_node,
6527 jumpif (exit_cond, loop_end,
6528 profile_probability::uninitialized ());
6530 /* Update the loop counter, and jump to the head of
6532 expand_assignment (index,
6533 build2 (PLUS_EXPR, TREE_TYPE (index),
6534 index, integer_one_node),
6537 emit_jump (loop_start);
6539 /* Build the end of the loop. */
6540 emit_label (loop_end);
6543 else if ((index != 0 && ! tree_fits_shwi_p (index))
6544 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6549 index = ssize_int (1);
6552 index = fold_convert (ssizetype,
6553 fold_build2 (MINUS_EXPR,
6556 TYPE_MIN_VALUE (domain)));
6559 size_binop (MULT_EXPR, index,
6560 fold_convert (ssizetype,
6561 TYPE_SIZE_UNIT (elttype)));
6562 xtarget = offset_address (target,
6563 expand_normal (position),
6564 highest_pow2_factor (position));
6565 xtarget = adjust_address (xtarget, mode, 0);
6566 store_expr (value, xtarget, 0, false, reverse);
6571 bitpos = ((tree_to_shwi (index) - minelt)
6572 * tree_to_uhwi (TYPE_SIZE (elttype)));
6574 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6576 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6577 && TREE_CODE (type) == ARRAY_TYPE
6578 && TYPE_NONALIASED_COMPONENT (type))
6580 target = copy_rtx (target);
6581 MEM_KEEP_ALIAS_SET_P (target) = 1;
6583 store_constructor_field (target, bitsize, bitpos, 0,
6584 bitregion_end, mode, value,
6585 cleared, get_alias_set (elttype),
6594 unsigned HOST_WIDE_INT idx;
6595 constructor_elt *ce;
6598 int icode = CODE_FOR_nothing;
6599 tree elttype = TREE_TYPE (type);
6600 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6601 machine_mode eltmode = TYPE_MODE (elttype);
6602 HOST_WIDE_INT bitsize;
6603 HOST_WIDE_INT bitpos;
6604 rtvec vector = NULL;
6606 alias_set_type alias;
6607 bool vec_vec_init_p = false;
6609 gcc_assert (eltmode != BLKmode);
6611 n_elts = TYPE_VECTOR_SUBPARTS (type);
6612 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6614 machine_mode mode = GET_MODE (target);
6615 machine_mode emode = eltmode;
6617 if (CONSTRUCTOR_NELTS (exp)
6618 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value))
6621 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value);
6622 gcc_assert (CONSTRUCTOR_NELTS (exp) * TYPE_VECTOR_SUBPARTS (etype)
6624 emode = TYPE_MODE (etype);
6626 icode = (int) convert_optab_handler (vec_init_optab, mode, emode);
6627 if (icode != CODE_FOR_nothing)
6629 unsigned int i, n = n_elts;
6631 if (emode != eltmode)
6633 n = CONSTRUCTOR_NELTS (exp);
6634 vec_vec_init_p = true;
6636 vector = rtvec_alloc (n);
6637 for (i = 0; i < n; i++)
6638 RTVEC_ELT (vector, i) = CONST0_RTX (emode);
6642 /* If the constructor has fewer elements than the vector,
6643 clear the whole array first. Similarly if this is static
6644 constructor of a non-BLKmode object. */
6647 else if (REG_P (target) && TREE_STATIC (exp))
6651 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6654 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6656 tree sz = TYPE_SIZE (TREE_TYPE (value));
6658 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz,
6659 TYPE_SIZE (elttype)));
6661 count += n_elts_here;
6662 if (mostly_zeros_p (value))
6663 zero_count += n_elts_here;
6666 /* Clear the entire vector first if there are any missing elements,
6667 or if the incidence of zero elements is >= 75%. */
6668 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6671 if (need_to_clear && size > 0 && !vector)
6674 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6676 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6680 /* Inform later passes that the old value is dead. */
6681 if (!cleared && !vector && REG_P (target))
6682 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6685 alias = MEM_ALIAS_SET (target);
6687 alias = get_alias_set (elttype);
6689 /* Store each element of the constructor into the corresponding
6690 element of TARGET, determined by counting the elements. */
6691 for (idx = 0, i = 0;
6692 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6693 idx++, i += bitsize / elt_size)
6695 HOST_WIDE_INT eltpos;
6696 tree value = ce->value;
6698 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6699 if (cleared && initializer_zerop (value))
6703 eltpos = tree_to_uhwi (ce->index);
6711 gcc_assert (ce->index == NULL_TREE);
6712 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE);
6716 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6717 RTVEC_ELT (vector, eltpos) = expand_normal (value);
6721 machine_mode value_mode
6722 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6723 ? TYPE_MODE (TREE_TYPE (value)) : eltmode);
6724 bitpos = eltpos * elt_size;
6725 store_constructor_field (target, bitsize, bitpos, 0,
6726 bitregion_end, value_mode,
6727 value, cleared, alias, reverse);
6732 emit_insn (GEN_FCN (icode) (target,
6733 gen_rtx_PARALLEL (GET_MODE (target),
6743 /* Store the value of EXP (an expression tree)
6744 into a subfield of TARGET which has mode MODE and occupies
6745 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6746 If MODE is VOIDmode, it means that we are storing into a bit-field.
6748 BITREGION_START is bitpos of the first bitfield in this region.
6749 BITREGION_END is the bitpos of the ending bitfield in this region.
6750 These two fields are 0, if the C++ memory model does not apply,
6751 or we are not interested in keeping track of bitfield regions.
6753 Always return const0_rtx unless we have something particular to
6756 ALIAS_SET is the alias set for the destination. This value will
6757 (in general) be different from that for TARGET, since TARGET is a
6758 reference to the containing structure.
6760 If NONTEMPORAL is true, try generating a nontemporal store.
6762 If REVERSE is true, the store is to be done in reverse order. */
6765 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6766 unsigned HOST_WIDE_INT bitregion_start,
6767 unsigned HOST_WIDE_INT bitregion_end,
6768 machine_mode mode, tree exp,
6769 alias_set_type alias_set, bool nontemporal, bool reverse)
6771 if (TREE_CODE (exp) == ERROR_MARK)
6774 /* If we have nothing to store, do nothing unless the expression has
6775 side-effects. Don't do that for zero sized addressable lhs of
6778 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6779 || TREE_CODE (exp) != CALL_EXPR))
6780 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6782 if (GET_CODE (target) == CONCAT)
6784 /* We're storing into a struct containing a single __complex. */
6786 gcc_assert (!bitpos);
6787 return store_expr (exp, target, 0, nontemporal, reverse);
6790 /* If the structure is in a register or if the component
6791 is a bit field, we cannot use addressing to access it.
6792 Use bit-field techniques or SUBREG to store in it. */
6794 if (mode == VOIDmode
6795 || (mode != BLKmode && ! direct_store[(int) mode]
6796 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6797 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6799 || GET_CODE (target) == SUBREG
6800 /* If the field isn't aligned enough to store as an ordinary memref,
6801 store it as a bit field. */
6803 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6804 || bitpos % GET_MODE_ALIGNMENT (mode))
6805 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target)))
6806 || (bitpos % BITS_PER_UNIT != 0)))
6807 || (bitsize >= 0 && mode != BLKmode
6808 && GET_MODE_BITSIZE (mode) > bitsize)
6809 /* If the RHS and field are a constant size and the size of the
6810 RHS isn't the same size as the bitfield, we must use bitfield
6813 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6814 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0
6815 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6816 we will handle specially below. */
6817 && !(TREE_CODE (exp) == CONSTRUCTOR
6818 && bitsize % BITS_PER_UNIT == 0)
6819 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6820 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6821 includes some extra padding. store_expr / expand_expr will in
6822 that case call get_inner_reference that will have the bitsize
6823 we check here and thus the block move will not clobber the
6824 padding that shouldn't be clobbered. In the future we could
6825 replace the TREE_ADDRESSABLE check with a check that
6826 get_base_address needs to live in memory. */
6827 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6828 || TREE_CODE (exp) != COMPONENT_REF
6829 || TREE_CODE (DECL_SIZE (TREE_OPERAND (exp, 1))) != INTEGER_CST
6830 || (bitsize % BITS_PER_UNIT != 0)
6831 || (bitpos % BITS_PER_UNIT != 0)
6832 || (compare_tree_int (DECL_SIZE (TREE_OPERAND (exp, 1)), bitsize)
6834 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6835 decl we must use bitfield operations. */
6837 && TREE_CODE (exp) == MEM_REF
6838 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6839 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6840 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6841 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6846 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6847 implies a mask operation. If the precision is the same size as
6848 the field we're storing into, that mask is redundant. This is
6849 particularly common with bit field assignments generated by the
6851 nop_def = get_def_for_expr (exp, NOP_EXPR);
6854 tree type = TREE_TYPE (exp);
6855 if (INTEGRAL_TYPE_P (type)
6856 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6857 && bitsize == TYPE_PRECISION (type))
6859 tree op = gimple_assign_rhs1 (nop_def);
6860 type = TREE_TYPE (op);
6861 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6866 temp = expand_normal (exp);
6868 /* Handle calls that return values in multiple non-contiguous locations.
6869 The Irix 6 ABI has examples of this. */
6870 if (GET_CODE (temp) == PARALLEL)
6872 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6873 scalar_int_mode temp_mode
6874 = smallest_int_mode_for_size (size * BITS_PER_UNIT);
6875 rtx temp_target = gen_reg_rtx (temp_mode);
6876 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6880 /* Handle calls that return BLKmode values in registers. */
6881 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6883 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6884 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6888 /* If the value has aggregate type and an integral mode then, if BITSIZE
6889 is narrower than this mode and this is for big-endian data, we first
6890 need to put the value into the low-order bits for store_bit_field,
6891 except when MODE is BLKmode and BITSIZE larger than the word size
6892 (see the handling of fields larger than a word in store_bit_field).
6893 Moreover, the field may be not aligned on a byte boundary; in this
6894 case, if it has reverse storage order, it needs to be accessed as a
6895 scalar field with reverse storage order and we must first put the
6896 value into target order. */
6897 scalar_int_mode temp_mode;
6898 if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
6899 && is_int_mode (GET_MODE (temp), &temp_mode))
6901 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode);
6903 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));
6906 temp = flip_storage_order (temp_mode, temp);
6909 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
6910 && !(mode == BLKmode && bitsize > BITS_PER_WORD))
6911 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp,
6912 size - bitsize, NULL_RTX, 1);
6915 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6916 if (mode != VOIDmode && mode != BLKmode
6917 && mode != TYPE_MODE (TREE_TYPE (exp)))
6918 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6920 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
6921 and BITPOS must be aligned on a byte boundary. If so, we simply do
6922 a block copy. Likewise for a BLKmode-like TARGET. */
6923 if (GET_MODE (temp) == BLKmode
6924 && (GET_MODE (target) == BLKmode
6926 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6927 && (bitpos % BITS_PER_UNIT) == 0
6928 && (bitsize % BITS_PER_UNIT) == 0)))
6930 gcc_assert (MEM_P (target) && MEM_P (temp)
6931 && (bitpos % BITS_PER_UNIT) == 0);
6933 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6934 emit_block_move (target, temp,
6935 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6942 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
6943 word size, we need to load the value (see again store_bit_field). */
6944 if (GET_MODE (temp) == BLKmode && bitsize <= BITS_PER_WORD)
6946 scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize);
6947 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
6948 temp_mode, false, NULL);
6951 /* Store the value in the bitfield. */
6952 store_bit_field (target, bitsize, bitpos,
6953 bitregion_start, bitregion_end,
6954 mode, temp, reverse);
6960 /* Now build a reference to just the desired component. */
6961 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6963 if (to_rtx == target)
6964 to_rtx = copy_rtx (to_rtx);
6966 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6967 set_mem_alias_set (to_rtx, alias_set);
6969 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
6970 into a target smaller than its type; handle that case now. */
6971 if (TREE_CODE (exp) == CONSTRUCTOR && bitsize >= 0)
6973 gcc_assert (bitsize % BITS_PER_UNIT == 0);
6974 store_constructor (exp, to_rtx, 0, bitsize / BITS_PER_UNIT, reverse);
6978 return store_expr (exp, to_rtx, 0, nontemporal, reverse);
6982 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6983 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6984 codes and find the ultimate containing object, which we return.
6986 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6987 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
6988 storage order of the field.
6989 If the position of the field is variable, we store a tree
6990 giving the variable offset (in units) in *POFFSET.
6991 This offset is in addition to the bit position.
6992 If the position is not variable, we store 0 in *POFFSET.
6994 If any of the extraction expressions is volatile,
6995 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6997 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6998 Otherwise, it is a mode that can be used to access the field.
7000 If the field describes a variable-sized object, *PMODE is set to
7001 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7002 this case, but the address of the object can be found. */
7005 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
7006 HOST_WIDE_INT *pbitpos, tree *poffset,
7007 machine_mode *pmode, int *punsignedp,
7008 int *preversep, int *pvolatilep)
7011 machine_mode mode = VOIDmode;
7012 bool blkmode_bitfield = false;
7013 tree offset = size_zero_node;
7014 offset_int bit_offset = 0;
7016 /* First get the mode, signedness, storage order and size. We do this from
7017 just the outermost expression. */
7019 if (TREE_CODE (exp) == COMPONENT_REF)
7021 tree field = TREE_OPERAND (exp, 1);
7022 size_tree = DECL_SIZE (field);
7023 if (flag_strict_volatile_bitfields > 0
7024 && TREE_THIS_VOLATILE (exp)
7025 && DECL_BIT_FIELD_TYPE (field)
7026 && DECL_MODE (field) != BLKmode)
7027 /* Volatile bitfields should be accessed in the mode of the
7028 field's type, not the mode computed based on the bit
7030 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
7031 else if (!DECL_BIT_FIELD (field))
7032 mode = DECL_MODE (field);
7033 else if (DECL_MODE (field) == BLKmode)
7034 blkmode_bitfield = true;
7036 *punsignedp = DECL_UNSIGNED (field);
7038 else if (TREE_CODE (exp) == BIT_FIELD_REF)
7040 size_tree = TREE_OPERAND (exp, 1);
7041 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
7042 || TYPE_UNSIGNED (TREE_TYPE (exp)));
7044 /* For vector types, with the correct size of access, use the mode of
7046 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
7047 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
7048 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
7049 mode = TYPE_MODE (TREE_TYPE (exp));
7053 mode = TYPE_MODE (TREE_TYPE (exp));
7054 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
7056 if (mode == BLKmode)
7057 size_tree = TYPE_SIZE (TREE_TYPE (exp));
7059 *pbitsize = GET_MODE_BITSIZE (mode);
7064 if (! tree_fits_uhwi_p (size_tree))
7065 mode = BLKmode, *pbitsize = -1;
7067 *pbitsize = tree_to_uhwi (size_tree);
7070 *preversep = reverse_storage_order_for_component_p (exp);
7072 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7073 and find the ultimate containing object. */
7076 switch (TREE_CODE (exp))
7079 bit_offset += wi::to_offset (TREE_OPERAND (exp, 2));
7084 tree field = TREE_OPERAND (exp, 1);
7085 tree this_offset = component_ref_field_offset (exp);
7087 /* If this field hasn't been filled in yet, don't go past it.
7088 This should only happen when folding expressions made during
7089 type construction. */
7090 if (this_offset == 0)
7093 offset = size_binop (PLUS_EXPR, offset, this_offset);
7094 bit_offset += wi::to_offset (DECL_FIELD_BIT_OFFSET (field));
7096 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7101 case ARRAY_RANGE_REF:
7103 tree index = TREE_OPERAND (exp, 1);
7104 tree low_bound = array_ref_low_bound (exp);
7105 tree unit_size = array_ref_element_size (exp);
7107 /* We assume all arrays have sizes that are a multiple of a byte.
7108 First subtract the lower bound, if any, in the type of the
7109 index, then convert to sizetype and multiply by the size of
7110 the array element. */
7111 if (! integer_zerop (low_bound))
7112 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
7115 offset = size_binop (PLUS_EXPR, offset,
7116 size_binop (MULT_EXPR,
7117 fold_convert (sizetype, index),
7126 bit_offset += *pbitsize;
7129 case VIEW_CONVERT_EXPR:
7133 /* Hand back the decl for MEM[&decl, off]. */
7134 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
7136 tree off = TREE_OPERAND (exp, 1);
7137 if (!integer_zerop (off))
7139 offset_int boff, coff = mem_ref_offset (exp);
7140 boff = coff << LOG2_BITS_PER_UNIT;
7143 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7151 /* If any reference in the chain is volatile, the effect is volatile. */
7152 if (TREE_THIS_VOLATILE (exp))
7155 exp = TREE_OPERAND (exp, 0);
7159 /* If OFFSET is constant, see if we can return the whole thing as a
7160 constant bit position. Make sure to handle overflow during
7162 if (TREE_CODE (offset) == INTEGER_CST)
7164 offset_int tem = wi::sext (wi::to_offset (offset),
7165 TYPE_PRECISION (sizetype));
7166 tem <<= LOG2_BITS_PER_UNIT;
7168 if (wi::fits_shwi_p (tem))
7170 *pbitpos = tem.to_shwi ();
7171 *poffset = offset = NULL_TREE;
7175 /* Otherwise, split it up. */
7178 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7179 if (wi::neg_p (bit_offset) || !wi::fits_shwi_p (bit_offset))
7181 offset_int mask = wi::mask <offset_int> (LOG2_BITS_PER_UNIT, false);
7182 offset_int tem = wi::bit_and_not (bit_offset, mask);
7183 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7184 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7186 tem >>= LOG2_BITS_PER_UNIT;
7187 offset = size_binop (PLUS_EXPR, offset,
7188 wide_int_to_tree (sizetype, tem));
7191 *pbitpos = bit_offset.to_shwi ();
7195 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7196 if (mode == VOIDmode
7198 && (*pbitpos % BITS_PER_UNIT) == 0
7199 && (*pbitsize % BITS_PER_UNIT) == 0)
7207 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7209 static unsigned HOST_WIDE_INT
7210 target_align (const_tree target)
7212 /* We might have a chain of nested references with intermediate misaligning
7213 bitfields components, so need to recurse to find out. */
7215 unsigned HOST_WIDE_INT this_align, outer_align;
7217 switch (TREE_CODE (target))
7223 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7224 outer_align = target_align (TREE_OPERAND (target, 0));
7225 return MIN (this_align, outer_align);
7228 case ARRAY_RANGE_REF:
7229 this_align = TYPE_ALIGN (TREE_TYPE (target));
7230 outer_align = target_align (TREE_OPERAND (target, 0));
7231 return MIN (this_align, outer_align);
7234 case NON_LVALUE_EXPR:
7235 case VIEW_CONVERT_EXPR:
7236 this_align = TYPE_ALIGN (TREE_TYPE (target));
7237 outer_align = target_align (TREE_OPERAND (target, 0));
7238 return MAX (this_align, outer_align);
7241 return TYPE_ALIGN (TREE_TYPE (target));
7246 /* Given an rtx VALUE that may contain additions and multiplications, return
7247 an equivalent value that just refers to a register, memory, or constant.
7248 This is done by generating instructions to perform the arithmetic and
7249 returning a pseudo-register containing the value.
7251 The returned value may be a REG, SUBREG, MEM or constant. */
7254 force_operand (rtx value, rtx target)
7257 /* Use subtarget as the target for operand 0 of a binary operation. */
7258 rtx subtarget = get_subtarget (target);
7259 enum rtx_code code = GET_CODE (value);
7261 /* Check for subreg applied to an expression produced by loop optimizer. */
7263 && !REG_P (SUBREG_REG (value))
7264 && !MEM_P (SUBREG_REG (value)))
7267 = simplify_gen_subreg (GET_MODE (value),
7268 force_reg (GET_MODE (SUBREG_REG (value)),
7269 force_operand (SUBREG_REG (value),
7271 GET_MODE (SUBREG_REG (value)),
7272 SUBREG_BYTE (value));
7273 code = GET_CODE (value);
7276 /* Check for a PIC address load. */
7277 if ((code == PLUS || code == MINUS)
7278 && XEXP (value, 0) == pic_offset_table_rtx
7279 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7280 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7281 || GET_CODE (XEXP (value, 1)) == CONST))
7284 subtarget = gen_reg_rtx (GET_MODE (value));
7285 emit_move_insn (subtarget, value);
7289 if (ARITHMETIC_P (value))
7291 op2 = XEXP (value, 1);
7292 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7294 if (code == MINUS && CONST_INT_P (op2))
7297 op2 = negate_rtx (GET_MODE (value), op2);
7300 /* Check for an addition with OP2 a constant integer and our first
7301 operand a PLUS of a virtual register and something else. In that
7302 case, we want to emit the sum of the virtual register and the
7303 constant first and then add the other value. This allows virtual
7304 register instantiation to simply modify the constant rather than
7305 creating another one around this addition. */
7306 if (code == PLUS && CONST_INT_P (op2)
7307 && GET_CODE (XEXP (value, 0)) == PLUS
7308 && REG_P (XEXP (XEXP (value, 0), 0))
7309 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7310 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7312 rtx temp = expand_simple_binop (GET_MODE (value), code,
7313 XEXP (XEXP (value, 0), 0), op2,
7314 subtarget, 0, OPTAB_LIB_WIDEN);
7315 return expand_simple_binop (GET_MODE (value), code, temp,
7316 force_operand (XEXP (XEXP (value,
7318 target, 0, OPTAB_LIB_WIDEN);
7321 op1 = force_operand (XEXP (value, 0), subtarget);
7322 op2 = force_operand (op2, NULL_RTX);
7326 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7328 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7329 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7330 target, 1, OPTAB_LIB_WIDEN);
7332 return expand_divmod (0,
7333 FLOAT_MODE_P (GET_MODE (value))
7334 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7335 GET_MODE (value), op1, op2, target, 0);
7337 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7340 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7343 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7346 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7347 target, 0, OPTAB_LIB_WIDEN);
7349 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7350 target, 1, OPTAB_LIB_WIDEN);
7353 if (UNARY_P (value))
7356 target = gen_reg_rtx (GET_MODE (value));
7357 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7364 case FLOAT_TRUNCATE:
7365 convert_move (target, op1, code == ZERO_EXTEND);
7370 expand_fix (target, op1, code == UNSIGNED_FIX);
7374 case UNSIGNED_FLOAT:
7375 expand_float (target, op1, code == UNSIGNED_FLOAT);
7379 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7383 #ifdef INSN_SCHEDULING
7384 /* On machines that have insn scheduling, we want all memory reference to be
7385 explicit, so we need to deal with such paradoxical SUBREGs. */
7386 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7388 = simplify_gen_subreg (GET_MODE (value),
7389 force_reg (GET_MODE (SUBREG_REG (value)),
7390 force_operand (SUBREG_REG (value),
7392 GET_MODE (SUBREG_REG (value)),
7393 SUBREG_BYTE (value));
7399 /* Subroutine of expand_expr: return nonzero iff there is no way that
7400 EXP can reference X, which is being modified. TOP_P is nonzero if this
7401 call is going to be used to determine whether we need a temporary
7402 for EXP, as opposed to a recursive call to this function.
7404 It is always safe for this routine to return zero since it merely
7405 searches for optimization opportunities. */
7408 safe_from_p (const_rtx x, tree exp, int top_p)
7414 /* If EXP has varying size, we MUST use a target since we currently
7415 have no way of allocating temporaries of variable size
7416 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7417 So we assume here that something at a higher level has prevented a
7418 clash. This is somewhat bogus, but the best we can do. Only
7419 do this when X is BLKmode and when we are at the top level. */
7420 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7421 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7422 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7423 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7424 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7426 && GET_MODE (x) == BLKmode)
7427 /* If X is in the outgoing argument area, it is always safe. */
7429 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7430 || (GET_CODE (XEXP (x, 0)) == PLUS
7431 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7434 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7435 find the underlying pseudo. */
7436 if (GET_CODE (x) == SUBREG)
7439 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7443 /* Now look at our tree code and possibly recurse. */
7444 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7446 case tcc_declaration:
7447 exp_rtl = DECL_RTL_IF_SET (exp);
7453 case tcc_exceptional:
7454 if (TREE_CODE (exp) == TREE_LIST)
7458 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7460 exp = TREE_CHAIN (exp);
7463 if (TREE_CODE (exp) != TREE_LIST)
7464 return safe_from_p (x, exp, 0);
7467 else if (TREE_CODE (exp) == CONSTRUCTOR)
7469 constructor_elt *ce;
7470 unsigned HOST_WIDE_INT idx;
7472 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7473 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7474 || !safe_from_p (x, ce->value, 0))
7478 else if (TREE_CODE (exp) == ERROR_MARK)
7479 return 1; /* An already-visited SAVE_EXPR? */
7484 /* The only case we look at here is the DECL_INITIAL inside a
7486 return (TREE_CODE (exp) != DECL_EXPR
7487 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7488 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7489 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7492 case tcc_comparison:
7493 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7498 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7500 case tcc_expression:
7503 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7504 the expression. If it is set, we conflict iff we are that rtx or
7505 both are in memory. Otherwise, we check all operands of the
7506 expression recursively. */
7508 switch (TREE_CODE (exp))
7511 /* If the operand is static or we are static, we can't conflict.
7512 Likewise if we don't conflict with the operand at all. */
7513 if (staticp (TREE_OPERAND (exp, 0))
7514 || TREE_STATIC (exp)
7515 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7518 /* Otherwise, the only way this can conflict is if we are taking
7519 the address of a DECL a that address if part of X, which is
7521 exp = TREE_OPERAND (exp, 0);
7524 if (!DECL_RTL_SET_P (exp)
7525 || !MEM_P (DECL_RTL (exp)))
7528 exp_rtl = XEXP (DECL_RTL (exp), 0);
7534 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7535 get_alias_set (exp)))
7540 /* Assume that the call will clobber all hard registers and
7542 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7547 case WITH_CLEANUP_EXPR:
7548 case CLEANUP_POINT_EXPR:
7549 /* Lowered by gimplify.c. */
7553 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7559 /* If we have an rtx, we do not need to scan our operands. */
7563 nops = TREE_OPERAND_LENGTH (exp);
7564 for (i = 0; i < nops; i++)
7565 if (TREE_OPERAND (exp, i) != 0
7566 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7572 /* Should never get a type here. */
7576 /* If we have an rtl, find any enclosed object. Then see if we conflict
7580 if (GET_CODE (exp_rtl) == SUBREG)
7582 exp_rtl = SUBREG_REG (exp_rtl);
7584 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7588 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7589 are memory and they conflict. */
7590 return ! (rtx_equal_p (x, exp_rtl)
7591 || (MEM_P (x) && MEM_P (exp_rtl)
7592 && true_dependence (exp_rtl, VOIDmode, x)));
7595 /* If we reach here, it is safe. */
7600 /* Return the highest power of two that EXP is known to be a multiple of.
7601 This is used in updating alignment of MEMs in array references. */
7603 unsigned HOST_WIDE_INT
7604 highest_pow2_factor (const_tree exp)
7606 unsigned HOST_WIDE_INT ret;
7607 int trailing_zeros = tree_ctz (exp);
7608 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7609 return BIGGEST_ALIGNMENT;
7610 ret = HOST_WIDE_INT_1U << trailing_zeros;
7611 if (ret > BIGGEST_ALIGNMENT)
7612 return BIGGEST_ALIGNMENT;
7616 /* Similar, except that the alignment requirements of TARGET are
7617 taken into account. Assume it is at least as aligned as its
7618 type, unless it is a COMPONENT_REF in which case the layout of
7619 the structure gives the alignment. */
7621 static unsigned HOST_WIDE_INT
7622 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7624 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7625 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7627 return MAX (factor, talign);
7630 /* Convert the tree comparison code TCODE to the rtl one where the
7631 signedness is UNSIGNEDP. */
7633 static enum rtx_code
7634 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7646 code = unsignedp ? LTU : LT;
7649 code = unsignedp ? LEU : LE;
7652 code = unsignedp ? GTU : GT;
7655 code = unsignedp ? GEU : GE;
7657 case UNORDERED_EXPR:
7688 /* Subroutine of expand_expr. Expand the two operands of a binary
7689 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7690 The value may be stored in TARGET if TARGET is nonzero. The
7691 MODIFIER argument is as documented by expand_expr. */
7694 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7695 enum expand_modifier modifier)
7697 if (! safe_from_p (target, exp1, 1))
7699 if (operand_equal_p (exp0, exp1, 0))
7701 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7702 *op1 = copy_rtx (*op0);
7706 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7707 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7712 /* Return a MEM that contains constant EXP. DEFER is as for
7713 output_constant_def and MODIFIER is as for expand_expr. */
7716 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7720 mem = output_constant_def (exp, defer);
7721 if (modifier != EXPAND_INITIALIZER)
7722 mem = use_anchored_address (mem);
7726 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7727 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7730 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode,
7731 enum expand_modifier modifier, addr_space_t as)
7733 rtx result, subtarget;
7735 HOST_WIDE_INT bitsize, bitpos;
7736 int unsignedp, reversep, volatilep = 0;
7739 /* If we are taking the address of a constant and are at the top level,
7740 we have to use output_constant_def since we can't call force_const_mem
7742 /* ??? This should be considered a front-end bug. We should not be
7743 generating ADDR_EXPR of something that isn't an LVALUE. The only
7744 exception here is STRING_CST. */
7745 if (CONSTANT_CLASS_P (exp))
7747 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7748 if (modifier < EXPAND_SUM)
7749 result = force_operand (result, target);
7753 /* Everything must be something allowed by is_gimple_addressable. */
7754 switch (TREE_CODE (exp))
7757 /* This case will happen via recursion for &a->b. */
7758 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7762 tree tem = TREE_OPERAND (exp, 0);
7763 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7764 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7765 return expand_expr (tem, target, tmode, modifier);
7769 /* Expand the initializer like constants above. */
7770 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7772 if (modifier < EXPAND_SUM)
7773 result = force_operand (result, target);
7777 /* The real part of the complex number is always first, therefore
7778 the address is the same as the address of the parent object. */
7781 inner = TREE_OPERAND (exp, 0);
7785 /* The imaginary part of the complex number is always second.
7786 The expression is therefore always offset by the size of the
7789 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp)));
7790 inner = TREE_OPERAND (exp, 0);
7793 case COMPOUND_LITERAL_EXPR:
7794 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7795 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7796 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7797 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7798 the initializers aren't gimplified. */
7799 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7800 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7801 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7802 target, tmode, modifier, as);
7805 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7806 expand_expr, as that can have various side effects; LABEL_DECLs for
7807 example, may not have their DECL_RTL set yet. Expand the rtl of
7808 CONSTRUCTORs too, which should yield a memory reference for the
7809 constructor's contents. Assume language specific tree nodes can
7810 be expanded in some interesting way. */
7811 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7813 || TREE_CODE (exp) == CONSTRUCTOR
7814 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7816 result = expand_expr (exp, target, tmode,
7817 modifier == EXPAND_INITIALIZER
7818 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7820 /* If the DECL isn't in memory, then the DECL wasn't properly
7821 marked TREE_ADDRESSABLE, which will be either a front-end
7822 or a tree optimizer bug. */
7824 gcc_assert (MEM_P (result));
7825 result = XEXP (result, 0);
7827 /* ??? Is this needed anymore? */
7829 TREE_USED (exp) = 1;
7831 if (modifier != EXPAND_INITIALIZER
7832 && modifier != EXPAND_CONST_ADDRESS
7833 && modifier != EXPAND_SUM)
7834 result = force_operand (result, target);
7838 /* Pass FALSE as the last argument to get_inner_reference although
7839 we are expanding to RTL. The rationale is that we know how to
7840 handle "aligning nodes" here: we can just bypass them because
7841 they won't change the final object whose address will be returned
7842 (they actually exist only for that purpose). */
7843 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
7844 &unsignedp, &reversep, &volatilep);
7848 /* We must have made progress. */
7849 gcc_assert (inner != exp);
7851 subtarget = offset || bitpos ? NULL_RTX : target;
7852 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7853 inner alignment, force the inner to be sufficiently aligned. */
7854 if (CONSTANT_CLASS_P (inner)
7855 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7857 inner = copy_node (inner);
7858 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7859 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp)));
7860 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7862 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7868 if (modifier != EXPAND_NORMAL)
7869 result = force_operand (result, NULL);
7870 tmp = expand_expr (offset, NULL_RTX, tmode,
7871 modifier == EXPAND_INITIALIZER
7872 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7874 /* expand_expr is allowed to return an object in a mode other
7875 than TMODE. If it did, we need to convert. */
7876 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
7877 tmp = convert_modes (tmode, GET_MODE (tmp),
7878 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
7879 result = convert_memory_address_addr_space (tmode, result, as);
7880 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7882 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7883 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7886 subtarget = bitpos ? NULL_RTX : target;
7887 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7888 1, OPTAB_LIB_WIDEN);
7894 /* Someone beforehand should have rejected taking the address
7895 of such an object. */
7896 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7898 result = convert_memory_address_addr_space (tmode, result, as);
7899 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7900 if (modifier < EXPAND_SUM)
7901 result = force_operand (result, target);
7907 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7908 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7911 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
7912 enum expand_modifier modifier)
7914 addr_space_t as = ADDR_SPACE_GENERIC;
7915 scalar_int_mode address_mode = Pmode;
7916 scalar_int_mode pointer_mode = ptr_mode;
7920 /* Target mode of VOIDmode says "whatever's natural". */
7921 if (tmode == VOIDmode)
7922 tmode = TYPE_MODE (TREE_TYPE (exp));
7924 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7926 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7927 address_mode = targetm.addr_space.address_mode (as);
7928 pointer_mode = targetm.addr_space.pointer_mode (as);
7931 /* We can get called with some Weird Things if the user does silliness
7932 like "(short) &a". In that case, convert_memory_address won't do
7933 the right thing, so ignore the given target mode. */
7934 scalar_int_mode new_tmode = (tmode == pointer_mode
7938 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7939 new_tmode, modifier, as);
7941 /* Despite expand_expr claims concerning ignoring TMODE when not
7942 strictly convenient, stuff breaks if we don't honor it. Note
7943 that combined with the above, we only do this for pointer modes. */
7944 rmode = GET_MODE (result);
7945 if (rmode == VOIDmode)
7947 if (rmode != new_tmode)
7948 result = convert_memory_address_addr_space (new_tmode, result, as);
7953 /* Generate code for computing CONSTRUCTOR EXP.
7954 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7955 is TRUE, instead of creating a temporary variable in memory
7956 NULL is returned and the caller needs to handle it differently. */
7959 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7960 bool avoid_temp_mem)
7962 tree type = TREE_TYPE (exp);
7963 machine_mode mode = TYPE_MODE (type);
7965 /* Try to avoid creating a temporary at all. This is possible
7966 if all of the initializer is zero.
7967 FIXME: try to handle all [0..255] initializers we can handle
7969 if (TREE_STATIC (exp)
7970 && !TREE_ADDRESSABLE (exp)
7971 && target != 0 && mode == BLKmode
7972 && all_zeros_p (exp))
7974 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7978 /* All elts simple constants => refer to a constant in memory. But
7979 if this is a non-BLKmode mode, let it store a field at a time
7980 since that should make a CONST_INT, CONST_WIDE_INT or
7981 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7982 use, it is best to store directly into the target unless the type
7983 is large enough that memcpy will be used. If we are making an
7984 initializer and all operands are constant, put it in memory as
7987 FIXME: Avoid trying to fill vector constructors piece-meal.
7988 Output them with output_constant_def below unless we're sure
7989 they're zeros. This should go away when vector initializers
7990 are treated like VECTOR_CST instead of arrays. */
7991 if ((TREE_STATIC (exp)
7992 && ((mode == BLKmode
7993 && ! (target != 0 && safe_from_p (target, exp, 1)))
7994 || TREE_ADDRESSABLE (exp)
7995 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
7996 && (! can_move_by_pieces
7997 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
7999 && ! mostly_zeros_p (exp))))
8000 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
8001 && TREE_CONSTANT (exp)))
8008 constructor = expand_expr_constant (exp, 1, modifier);
8010 if (modifier != EXPAND_CONST_ADDRESS
8011 && modifier != EXPAND_INITIALIZER
8012 && modifier != EXPAND_SUM)
8013 constructor = validize_mem (constructor);
8018 /* Handle calls that pass values in multiple non-contiguous
8019 locations. The Irix 6 ABI has examples of this. */
8020 if (target == 0 || ! safe_from_p (target, exp, 1)
8021 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
8026 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
8029 store_constructor (exp, target, 0, int_expr_size (exp), false);
8034 /* expand_expr: generate code for computing expression EXP.
8035 An rtx for the computed value is returned. The value is never null.
8036 In the case of a void EXP, const0_rtx is returned.
8038 The value may be stored in TARGET if TARGET is nonzero.
8039 TARGET is just a suggestion; callers must assume that
8040 the rtx returned may not be the same as TARGET.
8042 If TARGET is CONST0_RTX, it means that the value will be ignored.
8044 If TMODE is not VOIDmode, it suggests generating the
8045 result in mode TMODE. But this is done only when convenient.
8046 Otherwise, TMODE is ignored and the value generated in its natural mode.
8047 TMODE is just a suggestion; callers must assume that
8048 the rtx returned may not have mode TMODE.
8050 Note that TARGET may have neither TMODE nor MODE. In that case, it
8051 probably will not be used.
8053 If MODIFIER is EXPAND_SUM then when EXP is an addition
8054 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8055 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8056 products as above, or REG or MEM, or constant.
8057 Ordinarily in such cases we would output mul or add instructions
8058 and then return a pseudo reg containing the sum.
8060 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8061 it also marks a label as absolutely required (it can't be dead).
8062 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8063 This is used for outputting expressions used in initializers.
8065 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8066 with a constant address even if that address is not normally legitimate.
8067 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8069 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8070 a call parameter. Such targets require special care as we haven't yet
8071 marked TARGET so that it's safe from being trashed by libcalls. We
8072 don't want to use TARGET for anything but the final result;
8073 Intermediate values must go elsewhere. Additionally, calls to
8074 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8076 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8077 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8078 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8079 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8082 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8083 In this case, we don't adjust a returned MEM rtx that wouldn't be
8084 sufficiently aligned for its mode; instead, it's up to the caller
8085 to deal with it afterwards. This is used to make sure that unaligned
8086 base objects for which out-of-bounds accesses are supported, for
8087 example record types with trailing arrays, aren't realigned behind
8088 the back of the caller.
8089 The normal operating mode is to pass FALSE for this parameter. */
8092 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8093 enum expand_modifier modifier, rtx *alt_rtl,
8094 bool inner_reference_p)
8098 /* Handle ERROR_MARK before anybody tries to access its type. */
8099 if (TREE_CODE (exp) == ERROR_MARK
8100 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8102 ret = CONST0_RTX (tmode);
8103 return ret ? ret : const0_rtx;
8106 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8111 /* Try to expand the conditional expression which is represented by
8112 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8113 return the rtl reg which represents the result. Otherwise return
8117 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8118 tree treeop1 ATTRIBUTE_UNUSED,
8119 tree treeop2 ATTRIBUTE_UNUSED)
8122 rtx op00, op01, op1, op2;
8123 enum rtx_code comparison_code;
8124 machine_mode comparison_mode;
8127 tree type = TREE_TYPE (treeop1);
8128 int unsignedp = TYPE_UNSIGNED (type);
8129 machine_mode mode = TYPE_MODE (type);
8130 machine_mode orig_mode = mode;
8131 static bool expanding_cond_expr_using_cmove = false;
8133 /* Conditional move expansion can end up TERing two operands which,
8134 when recursively hitting conditional expressions can result in
8135 exponential behavior if the cmove expansion ultimatively fails.
8136 It's hardly profitable to TER a cmove into a cmove so avoid doing
8137 that by failing early if we end up recursing. */
8138 if (expanding_cond_expr_using_cmove)
8141 /* If we cannot do a conditional move on the mode, try doing it
8142 with the promoted mode. */
8143 if (!can_conditionally_move_p (mode))
8145 mode = promote_mode (type, mode, &unsignedp);
8146 if (!can_conditionally_move_p (mode))
8148 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8151 temp = assign_temp (type, 0, 1);
8153 expanding_cond_expr_using_cmove = true;
8155 expand_operands (treeop1, treeop2,
8156 temp, &op1, &op2, EXPAND_NORMAL);
8158 if (TREE_CODE (treeop0) == SSA_NAME
8159 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8161 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8162 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8163 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8164 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8165 comparison_mode = TYPE_MODE (type);
8166 unsignedp = TYPE_UNSIGNED (type);
8167 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8169 else if (COMPARISON_CLASS_P (treeop0))
8171 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8172 enum tree_code cmpcode = TREE_CODE (treeop0);
8173 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8174 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8175 unsignedp = TYPE_UNSIGNED (type);
8176 comparison_mode = TYPE_MODE (type);
8177 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8181 op00 = expand_normal (treeop0);
8183 comparison_code = NE;
8184 comparison_mode = GET_MODE (op00);
8185 if (comparison_mode == VOIDmode)
8186 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8188 expanding_cond_expr_using_cmove = false;
8190 if (GET_MODE (op1) != mode)
8191 op1 = gen_lowpart (mode, op1);
8193 if (GET_MODE (op2) != mode)
8194 op2 = gen_lowpart (mode, op2);
8196 /* Try to emit the conditional move. */
8197 insn = emit_conditional_move (temp, comparison_code,
8198 op00, op01, comparison_mode,
8202 /* If we could do the conditional move, emit the sequence,
8206 rtx_insn *seq = get_insns ();
8209 return convert_modes (orig_mode, mode, temp, 0);
8212 /* Otherwise discard the sequence and fall back to code with
8219 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8220 enum expand_modifier modifier)
8222 rtx op0, op1, op2, temp;
8223 rtx_code_label *lab;
8227 scalar_int_mode int_mode;
8228 enum tree_code code = ops->code;
8230 rtx subtarget, original_target;
8232 bool reduce_bit_field;
8233 location_t loc = ops->location;
8234 tree treeop0, treeop1, treeop2;
8235 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8236 ? reduce_to_bit_field_precision ((expr), \
8242 mode = TYPE_MODE (type);
8243 unsignedp = TYPE_UNSIGNED (type);
8249 /* We should be called only on simple (binary or unary) expressions,
8250 exactly those that are valid in gimple expressions that aren't
8251 GIMPLE_SINGLE_RHS (or invalid). */
8252 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8253 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8254 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8256 ignore = (target == const0_rtx
8257 || ((CONVERT_EXPR_CODE_P (code)
8258 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8259 && TREE_CODE (type) == VOID_TYPE));
8261 /* We should be called only if we need the result. */
8262 gcc_assert (!ignore);
8264 /* An operation in what may be a bit-field type needs the
8265 result to be reduced to the precision of the bit-field type,
8266 which is narrower than that of the type's mode. */
8267 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8268 && !type_has_mode_precision_p (type));
8270 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8273 /* Use subtarget as the target for operand 0 of a binary operation. */
8274 subtarget = get_subtarget (target);
8275 original_target = target;
8279 case NON_LVALUE_EXPR:
8282 if (treeop0 == error_mark_node)
8285 if (TREE_CODE (type) == UNION_TYPE)
8287 tree valtype = TREE_TYPE (treeop0);
8289 /* If both input and output are BLKmode, this conversion isn't doing
8290 anything except possibly changing memory attribute. */
8291 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8293 rtx result = expand_expr (treeop0, target, tmode,
8296 result = copy_rtx (result);
8297 set_mem_attributes (result, type, 0);
8303 if (TYPE_MODE (type) != BLKmode)
8304 target = gen_reg_rtx (TYPE_MODE (type));
8306 target = assign_temp (type, 1, 1);
8310 /* Store data into beginning of memory target. */
8311 store_expr (treeop0,
8312 adjust_address (target, TYPE_MODE (valtype), 0),
8313 modifier == EXPAND_STACK_PARM,
8314 false, TYPE_REVERSE_STORAGE_ORDER (type));
8318 gcc_assert (REG_P (target)
8319 && !TYPE_REVERSE_STORAGE_ORDER (type));
8321 /* Store this field into a union of the proper type. */
8322 store_field (target,
8323 MIN ((int_size_in_bytes (TREE_TYPE
8326 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8327 0, 0, 0, TYPE_MODE (valtype), treeop0, 0,
8331 /* Return the entire union. */
8335 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8337 op0 = expand_expr (treeop0, target, VOIDmode,
8340 /* If the signedness of the conversion differs and OP0 is
8341 a promoted SUBREG, clear that indication since we now
8342 have to do the proper extension. */
8343 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8344 && GET_CODE (op0) == SUBREG)
8345 SUBREG_PROMOTED_VAR_P (op0) = 0;
8347 return REDUCE_BIT_FIELD (op0);
8350 op0 = expand_expr (treeop0, NULL_RTX, mode,
8351 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8352 if (GET_MODE (op0) == mode)
8355 /* If OP0 is a constant, just convert it into the proper mode. */
8356 else if (CONSTANT_P (op0))
8358 tree inner_type = TREE_TYPE (treeop0);
8359 machine_mode inner_mode = GET_MODE (op0);
8361 if (inner_mode == VOIDmode)
8362 inner_mode = TYPE_MODE (inner_type);
8364 if (modifier == EXPAND_INITIALIZER)
8365 op0 = lowpart_subreg (mode, op0, inner_mode);
8367 op0= convert_modes (mode, inner_mode, op0,
8368 TYPE_UNSIGNED (inner_type));
8371 else if (modifier == EXPAND_INITIALIZER)
8372 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8373 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8375 else if (target == 0)
8376 op0 = convert_to_mode (mode, op0,
8377 TYPE_UNSIGNED (TREE_TYPE
8381 convert_move (target, op0,
8382 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8386 return REDUCE_BIT_FIELD (op0);
8388 case ADDR_SPACE_CONVERT_EXPR:
8390 tree treeop0_type = TREE_TYPE (treeop0);
8392 gcc_assert (POINTER_TYPE_P (type));
8393 gcc_assert (POINTER_TYPE_P (treeop0_type));
8395 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8396 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8398 /* Conversions between pointers to the same address space should
8399 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8400 gcc_assert (as_to != as_from);
8402 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8404 /* Ask target code to handle conversion between pointers
8405 to overlapping address spaces. */
8406 if (targetm.addr_space.subset_p (as_to, as_from)
8407 || targetm.addr_space.subset_p (as_from, as_to))
8409 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8413 /* For disjoint address spaces, converting anything but a null
8414 pointer invokes undefined behavior. We truncate or extend the
8415 value as if we'd converted via integers, which handles 0 as
8416 required, and all others as the programmer likely expects. */
8417 #ifndef POINTERS_EXTEND_UNSIGNED
8418 const int POINTERS_EXTEND_UNSIGNED = 1;
8420 op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
8421 op0, POINTERS_EXTEND_UNSIGNED);
8427 case POINTER_PLUS_EXPR:
8428 /* Even though the sizetype mode and the pointer's mode can be different
8429 expand is able to handle this correctly and get the correct result out
8430 of the PLUS_EXPR code. */
8431 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8432 if sizetype precision is smaller than pointer precision. */
8433 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8434 treeop1 = fold_convert_loc (loc, type,
8435 fold_convert_loc (loc, ssizetype,
8437 /* If sizetype precision is larger than pointer precision, truncate the
8438 offset to have matching modes. */
8439 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8440 treeop1 = fold_convert_loc (loc, type, treeop1);
8444 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8445 something else, make sure we add the register to the constant and
8446 then to the other thing. This case can occur during strength
8447 reduction and doing it this way will produce better code if the
8448 frame pointer or argument pointer is eliminated.
8450 fold-const.c will ensure that the constant is always in the inner
8451 PLUS_EXPR, so the only case we need to do anything about is if
8452 sp, ap, or fp is our second argument, in which case we must swap
8453 the innermost first argument and our second argument. */
8455 if (TREE_CODE (treeop0) == PLUS_EXPR
8456 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8458 && (DECL_RTL (treeop1) == frame_pointer_rtx
8459 || DECL_RTL (treeop1) == stack_pointer_rtx
8460 || DECL_RTL (treeop1) == arg_pointer_rtx))
8465 /* If the result is to be ptr_mode and we are adding an integer to
8466 something, we might be forming a constant. So try to use
8467 plus_constant. If it produces a sum and we can't accept it,
8468 use force_operand. This allows P = &ARR[const] to generate
8469 efficient code on machines where a SYMBOL_REF is not a valid
8472 If this is an EXPAND_SUM call, always return the sum. */
8473 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8474 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8476 if (modifier == EXPAND_STACK_PARM)
8478 if (TREE_CODE (treeop0) == INTEGER_CST
8479 && HWI_COMPUTABLE_MODE_P (mode)
8480 && TREE_CONSTANT (treeop1))
8484 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8486 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8488 /* Use wi::shwi to ensure that the constant is
8489 truncated according to the mode of OP1, then sign extended
8490 to a HOST_WIDE_INT. Using the constant directly can result
8491 in non-canonical RTL in a 64x32 cross compile. */
8492 wc = TREE_INT_CST_LOW (treeop0);
8494 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8495 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8496 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8497 op1 = force_operand (op1, target);
8498 return REDUCE_BIT_FIELD (op1);
8501 else if (TREE_CODE (treeop1) == INTEGER_CST
8502 && HWI_COMPUTABLE_MODE_P (mode)
8503 && TREE_CONSTANT (treeop0))
8507 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8509 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8510 (modifier == EXPAND_INITIALIZER
8511 ? EXPAND_INITIALIZER : EXPAND_SUM));
8512 if (! CONSTANT_P (op0))
8514 op1 = expand_expr (treeop1, NULL_RTX,
8515 VOIDmode, modifier);
8516 /* Return a PLUS if modifier says it's OK. */
8517 if (modifier == EXPAND_SUM
8518 || modifier == EXPAND_INITIALIZER)
8519 return simplify_gen_binary (PLUS, mode, op0, op1);
8522 /* Use wi::shwi to ensure that the constant is
8523 truncated according to the mode of OP1, then sign extended
8524 to a HOST_WIDE_INT. Using the constant directly can result
8525 in non-canonical RTL in a 64x32 cross compile. */
8526 wc = TREE_INT_CST_LOW (treeop1);
8528 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8529 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8530 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8531 op0 = force_operand (op0, target);
8532 return REDUCE_BIT_FIELD (op0);
8536 /* Use TER to expand pointer addition of a negated value
8537 as pointer subtraction. */
8538 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8539 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8540 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8541 && TREE_CODE (treeop1) == SSA_NAME
8542 && TYPE_MODE (TREE_TYPE (treeop0))
8543 == TYPE_MODE (TREE_TYPE (treeop1)))
8545 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR);
8548 treeop1 = gimple_assign_rhs1 (def);
8554 /* No sense saving up arithmetic to be done
8555 if it's all in the wrong mode to form part of an address.
8556 And force_operand won't know whether to sign-extend or
8558 if (modifier != EXPAND_INITIALIZER
8559 && (modifier != EXPAND_SUM || mode != ptr_mode))
8561 expand_operands (treeop0, treeop1,
8562 subtarget, &op0, &op1, modifier);
8563 if (op0 == const0_rtx)
8565 if (op1 == const0_rtx)
8570 expand_operands (treeop0, treeop1,
8571 subtarget, &op0, &op1, modifier);
8572 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8575 case POINTER_DIFF_EXPR:
8577 /* For initializers, we are allowed to return a MINUS of two
8578 symbolic constants. Here we handle all cases when both operands
8580 /* Handle difference of two symbolic constants,
8581 for the sake of an initializer. */
8582 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8583 && really_constant_p (treeop0)
8584 && really_constant_p (treeop1))
8586 expand_operands (treeop0, treeop1,
8587 NULL_RTX, &op0, &op1, modifier);
8588 return simplify_gen_binary (MINUS, mode, op0, op1);
8591 /* No sense saving up arithmetic to be done
8592 if it's all in the wrong mode to form part of an address.
8593 And force_operand won't know whether to sign-extend or
8595 if (modifier != EXPAND_INITIALIZER
8596 && (modifier != EXPAND_SUM || mode != ptr_mode))
8599 expand_operands (treeop0, treeop1,
8600 subtarget, &op0, &op1, modifier);
8602 /* Convert A - const to A + (-const). */
8603 if (CONST_INT_P (op1))
8605 op1 = negate_rtx (mode, op1);
8606 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8611 case WIDEN_MULT_PLUS_EXPR:
8612 case WIDEN_MULT_MINUS_EXPR:
8613 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8614 op2 = expand_normal (treeop2);
8615 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8619 case WIDEN_MULT_EXPR:
8620 /* If first operand is constant, swap them.
8621 Thus the following special case checks need only
8622 check the second operand. */
8623 if (TREE_CODE (treeop0) == INTEGER_CST)
8624 std::swap (treeop0, treeop1);
8626 /* First, check if we have a multiplication of one signed and one
8627 unsigned operand. */
8628 if (TREE_CODE (treeop1) != INTEGER_CST
8629 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8630 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8632 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8633 this_optab = usmul_widen_optab;
8634 if (find_widening_optab_handler (this_optab, mode, innermode)
8635 != CODE_FOR_nothing)
8637 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8638 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8641 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8643 /* op0 and op1 might still be constant, despite the above
8644 != INTEGER_CST check. Handle it. */
8645 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8647 op0 = convert_modes (innermode, mode, op0, true);
8648 op1 = convert_modes (innermode, mode, op1, false);
8649 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8650 target, unsignedp));
8655 /* Check for a multiplication with matching signedness. */
8656 else if ((TREE_CODE (treeop1) == INTEGER_CST
8657 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8658 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8659 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8661 tree op0type = TREE_TYPE (treeop0);
8662 machine_mode innermode = TYPE_MODE (op0type);
8663 bool zextend_p = TYPE_UNSIGNED (op0type);
8664 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8665 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8667 if (TREE_CODE (treeop0) != INTEGER_CST)
8669 if (find_widening_optab_handler (this_optab, mode, innermode)
8670 != CODE_FOR_nothing)
8672 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8674 /* op0 and op1 might still be constant, despite the above
8675 != INTEGER_CST check. Handle it. */
8676 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8679 op0 = convert_modes (innermode, mode, op0, zextend_p);
8681 = convert_modes (innermode, mode, op1,
8682 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8683 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8687 temp = expand_widening_mult (mode, op0, op1, target,
8688 unsignedp, this_optab);
8689 return REDUCE_BIT_FIELD (temp);
8691 if (find_widening_optab_handler (other_optab, mode, innermode)
8693 && innermode == word_mode)
8696 op0 = expand_normal (treeop0);
8697 if (TREE_CODE (treeop1) == INTEGER_CST)
8698 op1 = convert_modes (word_mode, mode,
8699 expand_normal (treeop1),
8700 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8702 op1 = expand_normal (treeop1);
8703 /* op0 and op1 might still be constant, despite the above
8704 != INTEGER_CST check. Handle it. */
8705 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8706 goto widen_mult_const;
8707 temp = expand_binop (mode, other_optab, op0, op1, target,
8708 unsignedp, OPTAB_LIB_WIDEN);
8709 hipart = gen_highpart (word_mode, temp);
8710 htem = expand_mult_highpart_adjust (word_mode, hipart,
8714 emit_move_insn (hipart, htem);
8715 return REDUCE_BIT_FIELD (temp);
8719 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8720 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8721 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8722 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8726 optab opt = fma_optab;
8727 gimple *def0, *def2;
8729 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8731 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8733 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8736 gcc_assert (fn != NULL_TREE);
8737 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8738 return expand_builtin (call_expr, target, subtarget, mode, false);
8741 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8742 /* The multiplication is commutative - look at its 2nd operand
8743 if the first isn't fed by a negate. */
8746 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8747 /* Swap operands if the 2nd operand is fed by a negate. */
8749 std::swap (treeop0, treeop1);
8751 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8756 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8759 op0 = expand_normal (gimple_assign_rhs1 (def0));
8760 op2 = expand_normal (gimple_assign_rhs1 (def2));
8763 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8766 op0 = expand_normal (gimple_assign_rhs1 (def0));
8769 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8772 op2 = expand_normal (gimple_assign_rhs1 (def2));
8776 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8778 op2 = expand_normal (treeop2);
8779 op1 = expand_normal (treeop1);
8781 return expand_ternary_op (TYPE_MODE (type), opt,
8782 op0, op1, op2, target, 0);
8786 /* If this is a fixed-point operation, then we cannot use the code
8787 below because "expand_mult" doesn't support sat/no-sat fixed-point
8789 if (ALL_FIXED_POINT_MODE_P (mode))
8792 /* If first operand is constant, swap them.
8793 Thus the following special case checks need only
8794 check the second operand. */
8795 if (TREE_CODE (treeop0) == INTEGER_CST)
8796 std::swap (treeop0, treeop1);
8798 /* Attempt to return something suitable for generating an
8799 indexed address, for machines that support that. */
8801 if (modifier == EXPAND_SUM && mode == ptr_mode
8802 && tree_fits_shwi_p (treeop1))
8804 tree exp1 = treeop1;
8806 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8810 op0 = force_operand (op0, NULL_RTX);
8812 op0 = copy_to_mode_reg (mode, op0);
8814 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8815 gen_int_mode (tree_to_shwi (exp1),
8816 TYPE_MODE (TREE_TYPE (exp1)))));
8819 if (modifier == EXPAND_STACK_PARM)
8822 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8823 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8825 case TRUNC_MOD_EXPR:
8826 case FLOOR_MOD_EXPR:
8828 case ROUND_MOD_EXPR:
8830 case TRUNC_DIV_EXPR:
8831 case FLOOR_DIV_EXPR:
8833 case ROUND_DIV_EXPR:
8834 case EXACT_DIV_EXPR:
8836 /* If this is a fixed-point operation, then we cannot use the code
8837 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8839 if (ALL_FIXED_POINT_MODE_P (mode))
8842 if (modifier == EXPAND_STACK_PARM)
8844 /* Possible optimization: compute the dividend with EXPAND_SUM
8845 then if the divisor is constant can optimize the case
8846 where some terms of the dividend have coeffs divisible by it. */
8847 expand_operands (treeop0, treeop1,
8848 subtarget, &op0, &op1, EXPAND_NORMAL);
8849 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR
8850 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR;
8851 if (SCALAR_INT_MODE_P (mode)
8853 && get_range_pos_neg (treeop0) == 1
8854 && get_range_pos_neg (treeop1) == 1)
8856 /* If both arguments are known to be positive when interpreted
8857 as signed, we can expand it as both signed and unsigned
8858 division or modulo. Choose the cheaper sequence in that case. */
8859 bool speed_p = optimize_insn_for_speed_p ();
8860 do_pending_stack_adjust ();
8862 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
8863 rtx_insn *uns_insns = get_insns ();
8866 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
8867 rtx_insn *sgn_insns = get_insns ();
8869 unsigned uns_cost = seq_cost (uns_insns, speed_p);
8870 unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
8872 /* If costs are the same then use as tie breaker the other
8874 if (uns_cost == sgn_cost)
8876 uns_cost = seq_cost (uns_insns, !speed_p);
8877 sgn_cost = seq_cost (sgn_insns, !speed_p);
8880 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp))
8882 emit_insn (uns_insns);
8885 emit_insn (sgn_insns);
8888 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp);
8893 case MULT_HIGHPART_EXPR:
8894 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8895 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8899 case FIXED_CONVERT_EXPR:
8900 op0 = expand_normal (treeop0);
8901 if (target == 0 || modifier == EXPAND_STACK_PARM)
8902 target = gen_reg_rtx (mode);
8904 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8905 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8906 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8907 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8909 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8912 case FIX_TRUNC_EXPR:
8913 op0 = expand_normal (treeop0);
8914 if (target == 0 || modifier == EXPAND_STACK_PARM)
8915 target = gen_reg_rtx (mode);
8916 expand_fix (target, op0, unsignedp);
8920 op0 = expand_normal (treeop0);
8921 if (target == 0 || modifier == EXPAND_STACK_PARM)
8922 target = gen_reg_rtx (mode);
8923 /* expand_float can't figure out what to do if FROM has VOIDmode.
8924 So give it the correct mode. With -O, cse will optimize this. */
8925 if (GET_MODE (op0) == VOIDmode)
8926 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8928 expand_float (target, op0,
8929 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8933 op0 = expand_expr (treeop0, subtarget,
8934 VOIDmode, EXPAND_NORMAL);
8935 if (modifier == EXPAND_STACK_PARM)
8937 temp = expand_unop (mode,
8938 optab_for_tree_code (NEGATE_EXPR, type,
8942 return REDUCE_BIT_FIELD (temp);
8945 op0 = expand_expr (treeop0, subtarget,
8946 VOIDmode, EXPAND_NORMAL);
8947 if (modifier == EXPAND_STACK_PARM)
8950 /* ABS_EXPR is not valid for complex arguments. */
8951 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8952 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8954 /* Unsigned abs is simply the operand. Testing here means we don't
8955 risk generating incorrect code below. */
8956 if (TYPE_UNSIGNED (type))
8959 return expand_abs (mode, op0, target, unsignedp,
8960 safe_from_p (target, treeop0, 1));
8964 target = original_target;
8966 || modifier == EXPAND_STACK_PARM
8967 || (MEM_P (target) && MEM_VOLATILE_P (target))
8968 || GET_MODE (target) != mode
8970 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8971 target = gen_reg_rtx (mode);
8972 expand_operands (treeop0, treeop1,
8973 target, &op0, &op1, EXPAND_NORMAL);
8975 /* First try to do it with a special MIN or MAX instruction.
8976 If that does not win, use a conditional jump to select the proper
8978 this_optab = optab_for_tree_code (code, type, optab_default);
8979 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8984 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
8985 and similarly for MAX <x, y>. */
8986 if (VECTOR_TYPE_P (type))
8988 tree t0 = make_tree (type, op0);
8989 tree t1 = make_tree (type, op1);
8990 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
8992 return expand_vec_cond_expr (type, comparison, t0, t1,
8996 /* At this point, a MEM target is no longer useful; we will get better
8999 if (! REG_P (target))
9000 target = gen_reg_rtx (mode);
9002 /* If op1 was placed in target, swap op0 and op1. */
9003 if (target != op0 && target == op1)
9004 std::swap (op0, op1);
9006 /* We generate better code and avoid problems with op1 mentioning
9007 target by forcing op1 into a pseudo if it isn't a constant. */
9008 if (! CONSTANT_P (op1))
9009 op1 = force_reg (mode, op1);
9012 enum rtx_code comparison_code;
9015 if (code == MAX_EXPR)
9016 comparison_code = unsignedp ? GEU : GE;
9018 comparison_code = unsignedp ? LEU : LE;
9020 /* Canonicalize to comparisons against 0. */
9021 if (op1 == const1_rtx)
9023 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9024 or (a != 0 ? a : 1) for unsigned.
9025 For MIN we are safe converting (a <= 1 ? a : 1)
9026 into (a <= 0 ? a : 1) */
9027 cmpop1 = const0_rtx;
9028 if (code == MAX_EXPR)
9029 comparison_code = unsignedp ? NE : GT;
9031 if (op1 == constm1_rtx && !unsignedp)
9033 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9034 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9035 cmpop1 = const0_rtx;
9036 if (code == MIN_EXPR)
9037 comparison_code = LT;
9040 /* Use a conditional move if possible. */
9041 if (can_conditionally_move_p (mode))
9047 /* Try to emit the conditional move. */
9048 insn = emit_conditional_move (target, comparison_code,
9053 /* If we could do the conditional move, emit the sequence,
9057 rtx_insn *seq = get_insns ();
9063 /* Otherwise discard the sequence and fall back to code with
9069 emit_move_insn (target, op0);
9071 lab = gen_label_rtx ();
9072 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
9073 unsignedp, mode, NULL_RTX, NULL, lab,
9074 profile_probability::uninitialized ());
9076 emit_move_insn (target, op1);
9081 op0 = expand_expr (treeop0, subtarget,
9082 VOIDmode, EXPAND_NORMAL);
9083 if (modifier == EXPAND_STACK_PARM)
9085 /* In case we have to reduce the result to bitfield precision
9086 for unsigned bitfield expand this as XOR with a proper constant
9088 if (reduce_bit_field && TYPE_UNSIGNED (type))
9090 int_mode = SCALAR_INT_TYPE_MODE (type);
9091 wide_int mask = wi::mask (TYPE_PRECISION (type),
9092 false, GET_MODE_PRECISION (int_mode));
9094 temp = expand_binop (int_mode, xor_optab, op0,
9095 immed_wide_int_const (mask, int_mode),
9096 target, 1, OPTAB_LIB_WIDEN);
9099 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9103 /* ??? Can optimize bitwise operations with one arg constant.
9104 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9105 and (a bitwise1 b) bitwise2 b (etc)
9106 but that is probably not worth while. */
9115 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9116 || type_has_mode_precision_p (type));
9122 /* If this is a fixed-point operation, then we cannot use the code
9123 below because "expand_shift" doesn't support sat/no-sat fixed-point
9125 if (ALL_FIXED_POINT_MODE_P (mode))
9128 if (! safe_from_p (subtarget, treeop1, 1))
9130 if (modifier == EXPAND_STACK_PARM)
9132 op0 = expand_expr (treeop0, subtarget,
9133 VOIDmode, EXPAND_NORMAL);
9135 /* Left shift optimization when shifting across word_size boundary.
9137 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9138 there isn't native instruction to support this wide mode
9139 left shift. Given below scenario:
9141 Type A = (Type) B << C
9144 | dest_high | dest_low |
9148 If the shift amount C caused we shift B to across the word
9149 size boundary, i.e part of B shifted into high half of
9150 destination register, and part of B remains in the low
9151 half, then GCC will use the following left shift expand
9154 1. Initialize dest_low to B.
9155 2. Initialize every bit of dest_high to the sign bit of B.
9156 3. Logic left shift dest_low by C bit to finalize dest_low.
9157 The value of dest_low before this shift is kept in a temp D.
9158 4. Logic left shift dest_high by C.
9159 5. Logic right shift D by (word_size - C).
9160 6. Or the result of 4 and 5 to finalize dest_high.
9162 While, by checking gimple statements, if operand B is
9163 coming from signed extension, then we can simplify above
9166 1. dest_high = src_low >> (word_size - C).
9167 2. dest_low = src_low << C.
9169 We can use one arithmetic right shift to finish all the
9170 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9171 needed from 6 into 2.
9173 The case is similar for zero extension, except that we
9174 initialize dest_high to zero rather than copies of the sign
9175 bit from B. Furthermore, we need to use a logical right shift
9178 The choice of sign-extension versus zero-extension is
9179 determined entirely by whether or not B is signed and is
9180 independent of the current setting of unsignedp. */
9183 if (code == LSHIFT_EXPR
9186 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode)
9188 && TREE_CONSTANT (treeop1)
9189 && TREE_CODE (treeop0) == SSA_NAME)
9191 gimple *def = SSA_NAME_DEF_STMT (treeop0);
9192 if (is_gimple_assign (def)
9193 && gimple_assign_rhs_code (def) == NOP_EXPR)
9195 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE
9196 (TREE_TYPE (gimple_assign_rhs1 (def)));
9198 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode)
9199 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
9200 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
9201 >= GET_MODE_BITSIZE (word_mode)))
9203 rtx_insn *seq, *seq_old;
9204 unsigned int high_off = subreg_highpart_offset (word_mode,
9206 bool extend_unsigned
9207 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def)));
9208 rtx low = lowpart_subreg (word_mode, op0, int_mode);
9209 rtx dest_low = lowpart_subreg (word_mode, target, int_mode);
9210 rtx dest_high = simplify_gen_subreg (word_mode, target,
9211 int_mode, high_off);
9212 HOST_WIDE_INT ramount = (BITS_PER_WORD
9213 - TREE_INT_CST_LOW (treeop1));
9214 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
9217 /* dest_high = src_low >> (word_size - C). */
9218 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
9221 if (temp != dest_high)
9222 emit_move_insn (dest_high, temp);
9224 /* dest_low = src_low << C. */
9225 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
9226 treeop1, dest_low, unsignedp);
9227 if (temp != dest_low)
9228 emit_move_insn (dest_low, temp);
9234 if (have_insn_for (ASHIFT, int_mode))
9236 bool speed_p = optimize_insn_for_speed_p ();
9238 rtx ret_old = expand_variable_shift (code, int_mode,
9243 seq_old = get_insns ();
9245 if (seq_cost (seq, speed_p)
9246 >= seq_cost (seq_old, speed_p))
9257 if (temp == NULL_RTX)
9258 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9260 if (code == LSHIFT_EXPR)
9261 temp = REDUCE_BIT_FIELD (temp);
9265 /* Could determine the answer when only additive constants differ. Also,
9266 the addition of one can be handled by changing the condition. */
9273 case UNORDERED_EXPR:
9282 temp = do_store_flag (ops,
9283 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9284 tmode != VOIDmode ? tmode : mode);
9288 /* Use a compare and a jump for BLKmode comparisons, or for function
9289 type comparisons is have_canonicalize_funcptr_for_compare. */
9292 || modifier == EXPAND_STACK_PARM
9293 || ! safe_from_p (target, treeop0, 1)
9294 || ! safe_from_p (target, treeop1, 1)
9295 /* Make sure we don't have a hard reg (such as function's return
9296 value) live across basic blocks, if not optimizing. */
9297 || (!optimize && REG_P (target)
9298 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9299 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9301 emit_move_insn (target, const0_rtx);
9303 rtx_code_label *lab1 = gen_label_rtx ();
9304 jumpifnot_1 (code, treeop0, treeop1, lab1,
9305 profile_probability::uninitialized ());
9307 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9308 emit_move_insn (target, constm1_rtx);
9310 emit_move_insn (target, const1_rtx);
9316 /* Get the rtx code of the operands. */
9317 op0 = expand_normal (treeop0);
9318 op1 = expand_normal (treeop1);
9321 target = gen_reg_rtx (TYPE_MODE (type));
9323 /* If target overlaps with op1, then either we need to force
9324 op1 into a pseudo (if target also overlaps with op0),
9325 or write the complex parts in reverse order. */
9326 switch (GET_CODE (target))
9329 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9331 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9333 complex_expr_force_op1:
9334 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9335 emit_move_insn (temp, op1);
9339 complex_expr_swap_order:
9340 /* Move the imaginary (op1) and real (op0) parts to their
9342 write_complex_part (target, op1, true);
9343 write_complex_part (target, op0, false);
9349 temp = adjust_address_nv (target,
9350 GET_MODE_INNER (GET_MODE (target)), 0);
9351 if (reg_overlap_mentioned_p (temp, op1))
9353 scalar_mode imode = GET_MODE_INNER (GET_MODE (target));
9354 temp = adjust_address_nv (target, imode,
9355 GET_MODE_SIZE (imode));
9356 if (reg_overlap_mentioned_p (temp, op0))
9357 goto complex_expr_force_op1;
9358 goto complex_expr_swap_order;
9362 if (reg_overlap_mentioned_p (target, op1))
9364 if (reg_overlap_mentioned_p (target, op0))
9365 goto complex_expr_force_op1;
9366 goto complex_expr_swap_order;
9371 /* Move the real (op0) and imaginary (op1) parts to their location. */
9372 write_complex_part (target, op0, false);
9373 write_complex_part (target, op1, true);
9377 case WIDEN_SUM_EXPR:
9379 tree oprnd0 = treeop0;
9380 tree oprnd1 = treeop1;
9382 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9383 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9388 case VEC_UNPACK_HI_EXPR:
9389 case VEC_UNPACK_LO_EXPR:
9391 op0 = expand_normal (treeop0);
9392 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9398 case VEC_UNPACK_FLOAT_HI_EXPR:
9399 case VEC_UNPACK_FLOAT_LO_EXPR:
9401 op0 = expand_normal (treeop0);
9402 /* The signedness is determined from input operand. */
9403 temp = expand_widen_pattern_expr
9404 (ops, op0, NULL_RTX, NULL_RTX,
9405 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9411 case VEC_WIDEN_MULT_HI_EXPR:
9412 case VEC_WIDEN_MULT_LO_EXPR:
9413 case VEC_WIDEN_MULT_EVEN_EXPR:
9414 case VEC_WIDEN_MULT_ODD_EXPR:
9415 case VEC_WIDEN_LSHIFT_HI_EXPR:
9416 case VEC_WIDEN_LSHIFT_LO_EXPR:
9417 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9418 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9420 gcc_assert (target);
9423 case VEC_PACK_TRUNC_EXPR:
9424 case VEC_PACK_SAT_EXPR:
9425 case VEC_PACK_FIX_TRUNC_EXPR:
9426 mode = TYPE_MODE (TREE_TYPE (treeop0));
9430 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9431 op2 = expand_normal (treeop2);
9433 /* Careful here: if the target doesn't support integral vector modes,
9434 a constant selection vector could wind up smooshed into a normal
9435 integral constant. */
9436 if (CONSTANT_P (op2) && !VECTOR_MODE_P (GET_MODE (op2)))
9438 tree sel_type = TREE_TYPE (treeop2);
9440 = mode_for_vector (SCALAR_TYPE_MODE (TREE_TYPE (sel_type)),
9441 TYPE_VECTOR_SUBPARTS (sel_type)).require ();
9442 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9443 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9444 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9447 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9449 temp = expand_vec_perm (mode, op0, op1, op2, target);
9455 tree oprnd0 = treeop0;
9456 tree oprnd1 = treeop1;
9457 tree oprnd2 = treeop2;
9460 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9461 op2 = expand_normal (oprnd2);
9462 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9469 tree oprnd0 = treeop0;
9470 tree oprnd1 = treeop1;
9471 tree oprnd2 = treeop2;
9474 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9475 op2 = expand_normal (oprnd2);
9476 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9481 case REALIGN_LOAD_EXPR:
9483 tree oprnd0 = treeop0;
9484 tree oprnd1 = treeop1;
9485 tree oprnd2 = treeop2;
9488 this_optab = optab_for_tree_code (code, type, optab_default);
9489 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9490 op2 = expand_normal (oprnd2);
9491 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9499 /* A COND_EXPR with its type being VOID_TYPE represents a
9500 conditional jump and is handled in
9501 expand_gimple_cond_expr. */
9502 gcc_assert (!VOID_TYPE_P (type));
9504 /* Note that COND_EXPRs whose type is a structure or union
9505 are required to be constructed to contain assignments of
9506 a temporary variable, so that we can evaluate them here
9507 for side effect only. If type is void, we must do likewise. */
9509 gcc_assert (!TREE_ADDRESSABLE (type)
9511 && TREE_TYPE (treeop1) != void_type_node
9512 && TREE_TYPE (treeop2) != void_type_node);
9514 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9518 /* If we are not to produce a result, we have no target. Otherwise,
9519 if a target was specified use it; it will not be used as an
9520 intermediate target unless it is safe. If no target, use a
9523 if (modifier != EXPAND_STACK_PARM
9525 && safe_from_p (original_target, treeop0, 1)
9526 && GET_MODE (original_target) == mode
9527 && !MEM_P (original_target))
9528 temp = original_target;
9530 temp = assign_temp (type, 0, 1);
9532 do_pending_stack_adjust ();
9534 rtx_code_label *lab0 = gen_label_rtx ();
9535 rtx_code_label *lab1 = gen_label_rtx ();
9536 jumpifnot (treeop0, lab0,
9537 profile_probability::uninitialized ());
9538 store_expr (treeop1, temp,
9539 modifier == EXPAND_STACK_PARM,
9542 emit_jump_insn (targetm.gen_jump (lab1));
9545 store_expr (treeop2, temp,
9546 modifier == EXPAND_STACK_PARM,
9555 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9558 case BIT_INSERT_EXPR:
9560 unsigned bitpos = tree_to_uhwi (treeop2);
9562 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1)))
9563 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1));
9565 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1)));
9566 rtx op0 = expand_normal (treeop0);
9567 rtx op1 = expand_normal (treeop1);
9568 rtx dst = gen_reg_rtx (mode);
9569 emit_move_insn (dst, op0);
9570 store_bit_field (dst, bitsize, bitpos, 0, 0,
9571 TYPE_MODE (TREE_TYPE (treeop1)), op1, false);
9579 /* Here to do an ordinary binary operator. */
9581 expand_operands (treeop0, treeop1,
9582 subtarget, &op0, &op1, EXPAND_NORMAL);
9584 this_optab = optab_for_tree_code (code, type, optab_default);
9586 if (modifier == EXPAND_STACK_PARM)
9588 temp = expand_binop (mode, this_optab, op0, op1, target,
9589 unsignedp, OPTAB_LIB_WIDEN);
9591 /* Bitwise operations do not need bitfield reduction as we expect their
9592 operands being properly truncated. */
9593 if (code == BIT_XOR_EXPR
9594 || code == BIT_AND_EXPR
9595 || code == BIT_IOR_EXPR)
9597 return REDUCE_BIT_FIELD (temp);
9599 #undef REDUCE_BIT_FIELD
9602 /* Return TRUE if expression STMT is suitable for replacement.
9603 Never consider memory loads as replaceable, because those don't ever lead
9604 into constant expressions. */
9607 stmt_is_replaceable_p (gimple *stmt)
9609 if (ssa_is_replaceable_p (stmt))
9611 /* Don't move around loads. */
9612 if (!gimple_assign_single_p (stmt)
9613 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9620 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9621 enum expand_modifier modifier, rtx *alt_rtl,
9622 bool inner_reference_p)
9624 rtx op0, op1, temp, decl_rtl;
9627 machine_mode mode, dmode;
9628 enum tree_code code = TREE_CODE (exp);
9629 rtx subtarget, original_target;
9632 bool reduce_bit_field;
9633 location_t loc = EXPR_LOCATION (exp);
9634 struct separate_ops ops;
9635 tree treeop0, treeop1, treeop2;
9636 tree ssa_name = NULL_TREE;
9639 type = TREE_TYPE (exp);
9640 mode = TYPE_MODE (type);
9641 unsignedp = TYPE_UNSIGNED (type);
9643 treeop0 = treeop1 = treeop2 = NULL_TREE;
9644 if (!VL_EXP_CLASS_P (exp))
9645 switch (TREE_CODE_LENGTH (code))
9648 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */
9649 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */
9650 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */
9660 ignore = (target == const0_rtx
9661 || ((CONVERT_EXPR_CODE_P (code)
9662 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9663 && TREE_CODE (type) == VOID_TYPE));
9665 /* An operation in what may be a bit-field type needs the
9666 result to be reduced to the precision of the bit-field type,
9667 which is narrower than that of the type's mode. */
9668 reduce_bit_field = (!ignore
9669 && INTEGRAL_TYPE_P (type)
9670 && !type_has_mode_precision_p (type));
9672 /* If we are going to ignore this result, we need only do something
9673 if there is a side-effect somewhere in the expression. If there
9674 is, short-circuit the most common cases here. Note that we must
9675 not call expand_expr with anything but const0_rtx in case this
9676 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9680 if (! TREE_SIDE_EFFECTS (exp))
9683 /* Ensure we reference a volatile object even if value is ignored, but
9684 don't do this if all we are doing is taking its address. */
9685 if (TREE_THIS_VOLATILE (exp)
9686 && TREE_CODE (exp) != FUNCTION_DECL
9687 && mode != VOIDmode && mode != BLKmode
9688 && modifier != EXPAND_CONST_ADDRESS)
9690 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9696 if (TREE_CODE_CLASS (code) == tcc_unary
9697 || code == BIT_FIELD_REF
9698 || code == COMPONENT_REF
9699 || code == INDIRECT_REF)
9700 return expand_expr (treeop0, const0_rtx, VOIDmode,
9703 else if (TREE_CODE_CLASS (code) == tcc_binary
9704 || TREE_CODE_CLASS (code) == tcc_comparison
9705 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9707 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9708 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9715 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9718 /* Use subtarget as the target for operand 0 of a binary operation. */
9719 subtarget = get_subtarget (target);
9720 original_target = target;
9726 tree function = decl_function_context (exp);
9728 temp = label_rtx (exp);
9729 temp = gen_rtx_LABEL_REF (Pmode, temp);
9731 if (function != current_function_decl
9733 LABEL_REF_NONLOCAL_P (temp) = 1;
9735 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9740 /* ??? ivopts calls expander, without any preparation from
9741 out-of-ssa. So fake instructions as if this was an access to the
9742 base variable. This unnecessarily allocates a pseudo, see how we can
9743 reuse it, if partition base vars have it set already. */
9744 if (!currently_expanding_to_rtl)
9746 tree var = SSA_NAME_VAR (exp);
9747 if (var && DECL_RTL_SET_P (var))
9748 return DECL_RTL (var);
9749 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9750 LAST_VIRTUAL_REGISTER + 1);
9753 g = get_gimple_for_ssa_name (exp);
9754 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9756 && modifier == EXPAND_INITIALIZER
9757 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9758 && (optimize || !SSA_NAME_VAR (exp)
9759 || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9760 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9761 g = SSA_NAME_DEF_STMT (exp);
9765 location_t saved_loc = curr_insn_location ();
9766 location_t loc = gimple_location (g);
9767 if (loc != UNKNOWN_LOCATION)
9768 set_curr_insn_location (loc);
9769 ops.code = gimple_assign_rhs_code (g);
9770 switch (get_gimple_rhs_class (ops.code))
9772 case GIMPLE_TERNARY_RHS:
9773 ops.op2 = gimple_assign_rhs3 (g);
9775 case GIMPLE_BINARY_RHS:
9776 ops.op1 = gimple_assign_rhs2 (g);
9778 /* Try to expand conditonal compare. */
9779 if (targetm.gen_ccmp_first)
9781 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9782 r = expand_ccmp_expr (g, mode);
9787 case GIMPLE_UNARY_RHS:
9788 ops.op0 = gimple_assign_rhs1 (g);
9789 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9791 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9793 case GIMPLE_SINGLE_RHS:
9795 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9796 tmode, modifier, alt_rtl,
9803 set_curr_insn_location (saved_loc);
9804 if (REG_P (r) && !REG_EXPR (r))
9805 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9810 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9811 exp = SSA_NAME_VAR (ssa_name);
9812 goto expand_decl_rtl;
9816 /* If a static var's type was incomplete when the decl was written,
9817 but the type is complete now, lay out the decl now. */
9818 if (DECL_SIZE (exp) == 0
9819 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9820 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9821 layout_decl (exp, 0);
9827 decl_rtl = DECL_RTL (exp);
9829 gcc_assert (decl_rtl);
9831 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9832 settings for VECTOR_TYPE_P that might switch for the function. */
9833 if (currently_expanding_to_rtl
9834 && code == VAR_DECL && MEM_P (decl_rtl)
9835 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
9836 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
9838 decl_rtl = copy_rtx (decl_rtl);
9840 /* Record writes to register variables. */
9841 if (modifier == EXPAND_WRITE
9843 && HARD_REGISTER_P (decl_rtl))
9844 add_to_hard_reg_set (&crtl->asm_clobbers,
9845 GET_MODE (decl_rtl), REGNO (decl_rtl));
9847 /* Ensure variable marked as used even if it doesn't go through
9848 a parser. If it hasn't be used yet, write out an external
9851 TREE_USED (exp) = 1;
9853 /* Show we haven't gotten RTL for this yet. */
9856 /* Variables inherited from containing functions should have
9857 been lowered by this point. */
9859 context = decl_function_context (exp);
9861 || SCOPE_FILE_SCOPE_P (context)
9862 || context == current_function_decl
9863 || TREE_STATIC (exp)
9864 || DECL_EXTERNAL (exp)
9865 /* ??? C++ creates functions that are not TREE_STATIC. */
9866 || TREE_CODE (exp) == FUNCTION_DECL);
9868 /* This is the case of an array whose size is to be determined
9869 from its initializer, while the initializer is still being parsed.
9870 ??? We aren't parsing while expanding anymore. */
9872 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9873 temp = validize_mem (decl_rtl);
9875 /* If DECL_RTL is memory, we are in the normal case and the
9876 address is not valid, get the address into a register. */
9878 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9881 *alt_rtl = decl_rtl;
9882 decl_rtl = use_anchored_address (decl_rtl);
9883 if (modifier != EXPAND_CONST_ADDRESS
9884 && modifier != EXPAND_SUM
9885 && !memory_address_addr_space_p (exp ? DECL_MODE (exp)
9886 : GET_MODE (decl_rtl),
9888 MEM_ADDR_SPACE (decl_rtl)))
9889 temp = replace_equiv_address (decl_rtl,
9890 copy_rtx (XEXP (decl_rtl, 0)));
9893 /* If we got something, return it. But first, set the alignment
9894 if the address is a register. */
9897 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0)))
9898 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9904 dmode = DECL_MODE (exp);
9906 dmode = TYPE_MODE (TREE_TYPE (ssa_name));
9908 /* If the mode of DECL_RTL does not match that of the decl,
9909 there are two cases: we are dealing with a BLKmode value
9910 that is returned in a register, or we are dealing with
9911 a promoted value. In the latter case, return a SUBREG
9912 of the wanted mode, but mark it so that we know that it
9913 was already extended. */
9914 if (REG_P (decl_rtl)
9916 && GET_MODE (decl_rtl) != dmode)
9920 /* Get the signedness to be used for this variable. Ensure we get
9921 the same mode we got when the variable was declared. */
9922 if (code != SSA_NAME)
9923 pmode = promote_decl_mode (exp, &unsignedp);
9924 else if ((g = SSA_NAME_DEF_STMT (ssa_name))
9925 && gimple_code (g) == GIMPLE_CALL
9926 && !gimple_call_internal_p (g))
9927 pmode = promote_function_mode (type, mode, &unsignedp,
9928 gimple_call_fntype (g),
9931 pmode = promote_ssa_mode (ssa_name, &unsignedp);
9932 gcc_assert (GET_MODE (decl_rtl) == pmode);
9934 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9935 SUBREG_PROMOTED_VAR_P (temp) = 1;
9936 SUBREG_PROMOTED_SET (temp, unsignedp);
9944 /* Given that TYPE_PRECISION (type) is not always equal to
9945 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9946 the former to the latter according to the signedness of the
9948 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type);
9949 temp = immed_wide_int_const
9950 (wi::to_wide (exp, GET_MODE_PRECISION (mode)), mode);
9956 tree tmp = NULL_TREE;
9957 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9958 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9959 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9960 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9961 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9962 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9963 return const_vector_from_tree (exp);
9964 scalar_int_mode int_mode;
9965 if (is_int_mode (mode, &int_mode))
9967 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
9968 return const_scalar_mask_from_tree (int_mode, exp);
9972 = lang_hooks.types.type_for_mode (int_mode, 1);
9974 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR,
9975 type_for_mode, exp);
9980 vec<constructor_elt, va_gc> *v;
9982 vec_alloc (v, VECTOR_CST_NELTS (exp));
9983 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9984 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9985 tmp = build_constructor (type, v);
9987 return expand_expr (tmp, ignore ? const0_rtx : target,
9992 if (modifier == EXPAND_WRITE)
9994 /* Writing into CONST_DECL is always invalid, but handle it
9996 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
9997 scalar_int_mode address_mode = targetm.addr_space.address_mode (as);
9998 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode,
10000 op0 = memory_address_addr_space (mode, op0, as);
10001 temp = gen_rtx_MEM (mode, op0);
10002 set_mem_addr_space (temp, as);
10005 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
10008 /* If optimized, generate immediate CONST_DOUBLE
10009 which will be turned into memory by reload if necessary.
10011 We used to force a register so that loop.c could see it. But
10012 this does not allow gen_* patterns to perform optimizations with
10013 the constants. It also produces two insns in cases like "x = 1.0;".
10014 On most machines, floating-point constants are not permitted in
10015 many insns, so we'd end up copying it to a register in any case.
10017 Now, we do the copying in expand_binop, if appropriate. */
10018 return const_double_from_real_value (TREE_REAL_CST (exp),
10019 TYPE_MODE (TREE_TYPE (exp)));
10022 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
10023 TYPE_MODE (TREE_TYPE (exp)));
10026 /* Handle evaluating a complex constant in a CONCAT target. */
10027 if (original_target && GET_CODE (original_target) == CONCAT)
10029 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
10032 rtarg = XEXP (original_target, 0);
10033 itarg = XEXP (original_target, 1);
10035 /* Move the real and imaginary parts separately. */
10036 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
10037 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
10040 emit_move_insn (rtarg, op0);
10042 emit_move_insn (itarg, op1);
10044 return original_target;
10050 temp = expand_expr_constant (exp, 1, modifier);
10052 /* temp contains a constant address.
10053 On RISC machines where a constant address isn't valid,
10054 make some insns to get that address into a register. */
10055 if (modifier != EXPAND_CONST_ADDRESS
10056 && modifier != EXPAND_INITIALIZER
10057 && modifier != EXPAND_SUM
10058 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
10059 MEM_ADDR_SPACE (temp)))
10060 return replace_equiv_address (temp,
10061 copy_rtx (XEXP (temp, 0)));
10066 tree val = treeop0;
10067 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
10068 inner_reference_p);
10070 if (!SAVE_EXPR_RESOLVED_P (exp))
10072 /* We can indeed still hit this case, typically via builtin
10073 expanders calling save_expr immediately before expanding
10074 something. Assume this means that we only have to deal
10075 with non-BLKmode values. */
10076 gcc_assert (GET_MODE (ret) != BLKmode);
10078 val = build_decl (curr_insn_location (),
10079 VAR_DECL, NULL, TREE_TYPE (exp));
10080 DECL_ARTIFICIAL (val) = 1;
10081 DECL_IGNORED_P (val) = 1;
10083 TREE_OPERAND (exp, 0) = treeop0;
10084 SAVE_EXPR_RESOLVED_P (exp) = 1;
10086 if (!CONSTANT_P (ret))
10087 ret = copy_to_reg (ret);
10088 SET_DECL_RTL (val, ret);
10096 /* If we don't need the result, just ensure we evaluate any
10100 unsigned HOST_WIDE_INT idx;
10103 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
10104 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
10109 return expand_constructor (exp, target, modifier, false);
10111 case TARGET_MEM_REF:
10114 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10115 enum insn_code icode;
10116 unsigned int align;
10118 op0 = addr_for_mem_ref (exp, as, true);
10119 op0 = memory_address_addr_space (mode, op0, as);
10120 temp = gen_rtx_MEM (mode, op0);
10121 set_mem_attributes (temp, exp, 0);
10122 set_mem_addr_space (temp, as);
10123 align = get_object_alignment (exp);
10124 if (modifier != EXPAND_WRITE
10125 && modifier != EXPAND_MEMORY
10127 && align < GET_MODE_ALIGNMENT (mode)
10128 /* If the target does not have special handling for unaligned
10129 loads of mode then it can use regular moves for them. */
10130 && ((icode = optab_handler (movmisalign_optab, mode))
10131 != CODE_FOR_nothing))
10133 struct expand_operand ops[2];
10135 /* We've already validated the memory, and we're creating a
10136 new pseudo destination. The predicates really can't fail,
10137 nor can the generator. */
10138 create_output_operand (&ops[0], NULL_RTX, mode);
10139 create_fixed_operand (&ops[1], temp);
10140 expand_insn (icode, 2, ops);
10141 temp = ops[0].value;
10148 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp);
10150 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10151 machine_mode address_mode;
10152 tree base = TREE_OPERAND (exp, 0);
10154 enum insn_code icode;
10156 /* Handle expansion of non-aliased memory with non-BLKmode. That
10157 might end up in a register. */
10158 if (mem_ref_refers_to_non_mem_p (exp))
10160 HOST_WIDE_INT offset = mem_ref_offset (exp).to_short_addr ();
10161 base = TREE_OPERAND (base, 0);
10164 && tree_fits_uhwi_p (TYPE_SIZE (type))
10165 && (GET_MODE_BITSIZE (DECL_MODE (base))
10166 == tree_to_uhwi (TYPE_SIZE (type))))
10167 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
10168 target, tmode, modifier);
10169 if (TYPE_MODE (type) == BLKmode)
10171 temp = assign_stack_temp (DECL_MODE (base),
10172 GET_MODE_SIZE (DECL_MODE (base)));
10173 store_expr (base, temp, 0, false, false);
10174 temp = adjust_address (temp, BLKmode, offset);
10175 set_mem_size (temp, int_size_in_bytes (type));
10178 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
10179 bitsize_int (offset * BITS_PER_UNIT));
10180 REF_REVERSE_STORAGE_ORDER (exp) = reverse;
10181 return expand_expr (exp, target, tmode, modifier);
10183 address_mode = targetm.addr_space.address_mode (as);
10184 base = TREE_OPERAND (exp, 0);
10185 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
10187 tree mask = gimple_assign_rhs2 (def_stmt);
10188 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
10189 gimple_assign_rhs1 (def_stmt), mask);
10190 TREE_OPERAND (exp, 0) = base;
10192 align = get_object_alignment (exp);
10193 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
10194 op0 = memory_address_addr_space (mode, op0, as);
10195 if (!integer_zerop (TREE_OPERAND (exp, 1)))
10197 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
10198 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
10199 op0 = memory_address_addr_space (mode, op0, as);
10201 temp = gen_rtx_MEM (mode, op0);
10202 set_mem_attributes (temp, exp, 0);
10203 set_mem_addr_space (temp, as);
10204 if (TREE_THIS_VOLATILE (exp))
10205 MEM_VOLATILE_P (temp) = 1;
10206 if (modifier != EXPAND_WRITE
10207 && modifier != EXPAND_MEMORY
10208 && !inner_reference_p
10210 && align < GET_MODE_ALIGNMENT (mode))
10212 if ((icode = optab_handler (movmisalign_optab, mode))
10213 != CODE_FOR_nothing)
10215 struct expand_operand ops[2];
10217 /* We've already validated the memory, and we're creating a
10218 new pseudo destination. The predicates really can't fail,
10219 nor can the generator. */
10220 create_output_operand (&ops[0], NULL_RTX, mode);
10221 create_fixed_operand (&ops[1], temp);
10222 expand_insn (icode, 2, ops);
10223 temp = ops[0].value;
10225 else if (targetm.slow_unaligned_access (mode, align))
10226 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
10227 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
10228 (modifier == EXPAND_STACK_PARM
10229 ? NULL_RTX : target),
10230 mode, mode, false, alt_rtl);
10233 && modifier != EXPAND_MEMORY
10234 && modifier != EXPAND_WRITE)
10235 temp = flip_storage_order (mode, temp);
10242 tree array = treeop0;
10243 tree index = treeop1;
10246 /* Fold an expression like: "foo"[2].
10247 This is not done in fold so it won't happen inside &.
10248 Don't fold if this is for wide characters since it's too
10249 difficult to do correctly and this is a very rare case. */
10251 if (modifier != EXPAND_CONST_ADDRESS
10252 && modifier != EXPAND_INITIALIZER
10253 && modifier != EXPAND_MEMORY)
10255 tree t = fold_read_from_constant_string (exp);
10258 return expand_expr (t, target, tmode, modifier);
10261 /* If this is a constant index into a constant array,
10262 just get the value from the array. Handle both the cases when
10263 we have an explicit constructor and when our operand is a variable
10264 that was declared const. */
10266 if (modifier != EXPAND_CONST_ADDRESS
10267 && modifier != EXPAND_INITIALIZER
10268 && modifier != EXPAND_MEMORY
10269 && TREE_CODE (array) == CONSTRUCTOR
10270 && ! TREE_SIDE_EFFECTS (array)
10271 && TREE_CODE (index) == INTEGER_CST)
10273 unsigned HOST_WIDE_INT ix;
10276 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10278 if (tree_int_cst_equal (field, index))
10280 if (!TREE_SIDE_EFFECTS (value))
10281 return expand_expr (fold (value), target, tmode, modifier);
10286 else if (optimize >= 1
10287 && modifier != EXPAND_CONST_ADDRESS
10288 && modifier != EXPAND_INITIALIZER
10289 && modifier != EXPAND_MEMORY
10290 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10291 && TREE_CODE (index) == INTEGER_CST
10292 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
10293 && (init = ctor_for_folding (array)) != error_mark_node)
10295 if (init == NULL_TREE)
10297 tree value = build_zero_cst (type);
10298 if (TREE_CODE (value) == CONSTRUCTOR)
10300 /* If VALUE is a CONSTRUCTOR, this optimization is only
10301 useful if this doesn't store the CONSTRUCTOR into
10302 memory. If it does, it is more efficient to just
10303 load the data from the array directly. */
10304 rtx ret = expand_constructor (value, target,
10306 if (ret == NULL_RTX)
10311 return expand_expr (value, target, tmode, modifier);
10313 else if (TREE_CODE (init) == CONSTRUCTOR)
10315 unsigned HOST_WIDE_INT ix;
10318 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10320 if (tree_int_cst_equal (field, index))
10322 if (TREE_SIDE_EFFECTS (value))
10325 if (TREE_CODE (value) == CONSTRUCTOR)
10327 /* If VALUE is a CONSTRUCTOR, this
10328 optimization is only useful if
10329 this doesn't store the CONSTRUCTOR
10330 into memory. If it does, it is more
10331 efficient to just load the data from
10332 the array directly. */
10333 rtx ret = expand_constructor (value, target,
10335 if (ret == NULL_RTX)
10340 expand_expr (fold (value), target, tmode, modifier);
10343 else if (TREE_CODE (init) == STRING_CST)
10345 tree low_bound = array_ref_low_bound (exp);
10346 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10348 /* Optimize the special case of a zero lower bound.
10350 We convert the lower bound to sizetype to avoid problems
10351 with constant folding. E.g. suppose the lower bound is
10352 1 and its mode is QI. Without the conversion
10353 (ARRAY + (INDEX - (unsigned char)1))
10355 (ARRAY + (-(unsigned char)1) + INDEX)
10357 (ARRAY + 255 + INDEX). Oops! */
10358 if (!integer_zerop (low_bound))
10359 index1 = size_diffop_loc (loc, index1,
10360 fold_convert_loc (loc, sizetype,
10363 if (tree_fits_uhwi_p (index1)
10364 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10366 tree type = TREE_TYPE (TREE_TYPE (init));
10367 scalar_int_mode mode;
10369 if (is_int_mode (TYPE_MODE (type), &mode)
10370 && GET_MODE_SIZE (mode) == 1)
10371 return gen_int_mode (TREE_STRING_POINTER (init)
10372 [TREE_INT_CST_LOW (index1)],
10378 goto normal_inner_ref;
10380 case COMPONENT_REF:
10381 /* If the operand is a CONSTRUCTOR, we can just extract the
10382 appropriate field if it is present. */
10383 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10385 unsigned HOST_WIDE_INT idx;
10387 scalar_int_mode field_mode;
10389 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10391 if (field == treeop1
10392 /* We can normally use the value of the field in the
10393 CONSTRUCTOR. However, if this is a bitfield in
10394 an integral mode that we can fit in a HOST_WIDE_INT,
10395 we must mask only the number of bits in the bitfield,
10396 since this is done implicitly by the constructor. If
10397 the bitfield does not meet either of those conditions,
10398 we can't do this optimization. */
10399 && (! DECL_BIT_FIELD (field)
10400 || (is_int_mode (DECL_MODE (field), &field_mode)
10401 && (GET_MODE_PRECISION (field_mode)
10402 <= HOST_BITS_PER_WIDE_INT))))
10404 if (DECL_BIT_FIELD (field)
10405 && modifier == EXPAND_STACK_PARM)
10407 op0 = expand_expr (value, target, tmode, modifier);
10408 if (DECL_BIT_FIELD (field))
10410 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10411 scalar_int_mode imode
10412 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field));
10414 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10416 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1,
10418 op0 = expand_and (imode, op0, op1, target);
10422 int count = GET_MODE_PRECISION (imode) - bitsize;
10424 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10426 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10434 goto normal_inner_ref;
10436 case BIT_FIELD_REF:
10437 case ARRAY_RANGE_REF:
10440 machine_mode mode1, mode2;
10441 HOST_WIDE_INT bitsize, bitpos;
10443 int reversep, volatilep = 0, must_force_mem;
10445 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
10446 &unsignedp, &reversep, &volatilep);
10447 rtx orig_op0, memloc;
10448 bool clear_mem_expr = false;
10450 /* If we got back the original object, something is wrong. Perhaps
10451 we are evaluating an expression too early. In any event, don't
10452 infinitely recurse. */
10453 gcc_assert (tem != exp);
10455 /* If TEM's type is a union of variable size, pass TARGET to the inner
10456 computation, since it will need a temporary and TARGET is known
10457 to have to do. This occurs in unchecked conversion in Ada. */
10459 = expand_expr_real (tem,
10460 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10461 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10462 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10464 && modifier != EXPAND_STACK_PARM
10465 ? target : NULL_RTX),
10467 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10470 /* If the field has a mode, we want to access it in the
10471 field's mode, not the computed mode.
10472 If a MEM has VOIDmode (external with incomplete type),
10473 use BLKmode for it instead. */
10476 if (mode1 != VOIDmode)
10477 op0 = adjust_address (op0, mode1, 0);
10478 else if (GET_MODE (op0) == VOIDmode)
10479 op0 = adjust_address (op0, BLKmode, 0);
10483 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10485 /* If we have either an offset, a BLKmode result, or a reference
10486 outside the underlying object, we must force it to memory.
10487 Such a case can occur in Ada if we have unchecked conversion
10488 of an expression from a scalar type to an aggregate type or
10489 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10490 passed a partially uninitialized object or a view-conversion
10491 to a larger size. */
10492 must_force_mem = (offset
10493 || mode1 == BLKmode
10494 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
10496 /* Handle CONCAT first. */
10497 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10500 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0))
10501 && COMPLEX_MODE_P (mode1)
10502 && COMPLEX_MODE_P (GET_MODE (op0))
10503 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1))
10504 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0)))))
10507 op0 = flip_storage_order (GET_MODE (op0), op0);
10508 if (mode1 != GET_MODE (op0))
10511 for (int i = 0; i < 2; i++)
10513 rtx op = read_complex_part (op0, i != 0);
10514 if (GET_CODE (op) == SUBREG)
10515 op = force_reg (GET_MODE (op), op);
10516 rtx temp = gen_lowpart_common (GET_MODE_INNER (mode1),
10522 if (!REG_P (op) && !MEM_P (op))
10523 op = force_reg (GET_MODE (op), op);
10524 op = gen_lowpart (GET_MODE_INNER (mode1), op);
10528 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]);
10533 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10536 op0 = XEXP (op0, 0);
10537 mode2 = GET_MODE (op0);
10539 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
10540 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
10544 op0 = XEXP (op0, 1);
10546 mode2 = GET_MODE (op0);
10549 /* Otherwise force into memory. */
10550 must_force_mem = 1;
10553 /* If this is a constant, put it in a register if it is a legitimate
10554 constant and we don't need a memory reference. */
10555 if (CONSTANT_P (op0)
10556 && mode2 != BLKmode
10557 && targetm.legitimate_constant_p (mode2, op0)
10558 && !must_force_mem)
10559 op0 = force_reg (mode2, op0);
10561 /* Otherwise, if this is a constant, try to force it to the constant
10562 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10563 is a legitimate constant. */
10564 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10565 op0 = validize_mem (memloc);
10567 /* Otherwise, if this is a constant or the object is not in memory
10568 and need be, put it there. */
10569 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10571 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10572 emit_move_insn (memloc, op0);
10574 clear_mem_expr = true;
10579 machine_mode address_mode;
10580 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10583 gcc_assert (MEM_P (op0));
10585 address_mode = get_address_mode (op0);
10586 if (GET_MODE (offset_rtx) != address_mode)
10588 /* We cannot be sure that the RTL in offset_rtx is valid outside
10589 of a memory address context, so force it into a register
10590 before attempting to convert it to the desired mode. */
10591 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10592 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10595 /* See the comment in expand_assignment for the rationale. */
10596 if (mode1 != VOIDmode
10599 && (bitpos % bitsize) == 0
10600 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10601 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10603 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10607 op0 = offset_address (op0, offset_rtx,
10608 highest_pow2_factor (offset));
10611 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10612 record its alignment as BIGGEST_ALIGNMENT. */
10613 if (MEM_P (op0) && bitpos == 0 && offset != 0
10614 && is_aligning_offset (offset, tem))
10615 set_mem_align (op0, BIGGEST_ALIGNMENT);
10617 /* Don't forget about volatility even if this is a bitfield. */
10618 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10620 if (op0 == orig_op0)
10621 op0 = copy_rtx (op0);
10623 MEM_VOLATILE_P (op0) = 1;
10626 /* In cases where an aligned union has an unaligned object
10627 as a field, we might be extracting a BLKmode value from
10628 an integer-mode (e.g., SImode) object. Handle this case
10629 by doing the extract into an object as wide as the field
10630 (which we know to be the width of a basic mode), then
10631 storing into memory, and changing the mode to BLKmode. */
10632 if (mode1 == VOIDmode
10633 || REG_P (op0) || GET_CODE (op0) == SUBREG
10634 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10635 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10636 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10637 && modifier != EXPAND_CONST_ADDRESS
10638 && modifier != EXPAND_INITIALIZER
10639 && modifier != EXPAND_MEMORY)
10640 /* If the bitfield is volatile and the bitsize
10641 is narrower than the access size of the bitfield,
10642 we need to extract bitfields from the access. */
10643 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10644 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10645 && mode1 != BLKmode
10646 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)
10647 /* If the field isn't aligned enough to fetch as a memref,
10648 fetch it as a bit field. */
10649 || (mode1 != BLKmode
10651 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10652 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0)
10653 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10654 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
10655 && modifier != EXPAND_MEMORY
10656 && ((modifier == EXPAND_CONST_ADDRESS
10657 || modifier == EXPAND_INITIALIZER)
10659 : targetm.slow_unaligned_access (mode1,
10661 || (bitpos % BITS_PER_UNIT != 0)))
10662 /* If the type and the field are a constant size and the
10663 size of the type isn't the same size as the bitfield,
10664 we must use bitfield operations. */
10666 && TYPE_SIZE (TREE_TYPE (exp))
10667 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10668 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10671 machine_mode ext_mode = mode;
10673 if (ext_mode == BLKmode
10674 && ! (target != 0 && MEM_P (op0)
10676 && bitpos % BITS_PER_UNIT == 0))
10677 ext_mode = int_mode_for_size (bitsize, 1).else_blk ();
10679 if (ext_mode == BLKmode)
10682 target = assign_temp (type, 1, 1);
10684 /* ??? Unlike the similar test a few lines below, this one is
10685 very likely obsolete. */
10689 /* In this case, BITPOS must start at a byte boundary and
10690 TARGET, if specified, must be a MEM. */
10691 gcc_assert (MEM_P (op0)
10692 && (!target || MEM_P (target))
10693 && !(bitpos % BITS_PER_UNIT));
10695 emit_block_move (target,
10696 adjust_address (op0, VOIDmode,
10697 bitpos / BITS_PER_UNIT),
10698 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10700 (modifier == EXPAND_STACK_PARM
10701 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10706 /* If we have nothing to extract, the result will be 0 for targets
10707 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10708 return 0 for the sake of consistency, as reading a zero-sized
10709 bitfield is valid in Ada and the value is fully specified. */
10713 op0 = validize_mem (op0);
10715 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10716 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10718 /* If the result has a record type and the extraction is done in
10719 an integral mode, then the field may be not aligned on a byte
10720 boundary; in this case, if it has reverse storage order, it
10721 needs to be extracted as a scalar field with reverse storage
10722 order and put back into memory order afterwards. */
10723 if (TREE_CODE (type) == RECORD_TYPE
10724 && GET_MODE_CLASS (ext_mode) == MODE_INT)
10725 reversep = TYPE_REVERSE_STORAGE_ORDER (type);
10727 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10728 (modifier == EXPAND_STACK_PARM
10729 ? NULL_RTX : target),
10730 ext_mode, ext_mode, reversep, alt_rtl);
10732 /* If the result has a record type and the mode of OP0 is an
10733 integral mode then, if BITSIZE is narrower than this mode
10734 and this is for big-endian data, we must put the field
10735 into the high-order bits. And we must also put it back
10736 into memory order if it has been previously reversed. */
10737 scalar_int_mode op0_mode;
10738 if (TREE_CODE (type) == RECORD_TYPE
10739 && is_int_mode (GET_MODE (op0), &op0_mode))
10741 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode);
10744 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
10745 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0,
10746 size - bitsize, op0, 1);
10749 op0 = flip_storage_order (op0_mode, op0);
10752 /* If the result type is BLKmode, store the data into a temporary
10753 of the appropriate type, but with the mode corresponding to the
10754 mode for the data we have (op0's mode). */
10755 if (mode == BLKmode)
10758 = assign_stack_temp_for_type (ext_mode,
10759 GET_MODE_BITSIZE (ext_mode),
10761 emit_move_insn (new_rtx, op0);
10762 op0 = copy_rtx (new_rtx);
10763 PUT_MODE (op0, BLKmode);
10769 /* If the result is BLKmode, use that to access the object
10771 if (mode == BLKmode)
10774 /* Get a reference to just this component. */
10775 if (modifier == EXPAND_CONST_ADDRESS
10776 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10777 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10779 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10781 if (op0 == orig_op0)
10782 op0 = copy_rtx (op0);
10784 /* Don't set memory attributes if the base expression is
10785 SSA_NAME that got expanded as a MEM. In that case, we should
10786 just honor its original memory attributes. */
10787 if (TREE_CODE (tem) != SSA_NAME || !MEM_P (orig_op0))
10788 set_mem_attributes (op0, exp, 0);
10790 if (REG_P (XEXP (op0, 0)))
10791 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10793 /* If op0 is a temporary because the original expressions was forced
10794 to memory, clear MEM_EXPR so that the original expression cannot
10795 be marked as addressable through MEM_EXPR of the temporary. */
10796 if (clear_mem_expr)
10797 set_mem_expr (op0, NULL_TREE);
10799 MEM_VOLATILE_P (op0) |= volatilep;
10802 && modifier != EXPAND_MEMORY
10803 && modifier != EXPAND_WRITE)
10804 op0 = flip_storage_order (mode1, op0);
10806 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10807 || modifier == EXPAND_CONST_ADDRESS
10808 || modifier == EXPAND_INITIALIZER)
10812 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10814 convert_move (target, op0, unsignedp);
10819 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10822 /* All valid uses of __builtin_va_arg_pack () are removed during
10824 if (CALL_EXPR_VA_ARG_PACK (exp))
10825 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10827 tree fndecl = get_callee_fndecl (exp), attr;
10830 && (attr = lookup_attribute ("error",
10831 DECL_ATTRIBUTES (fndecl))) != NULL)
10832 error ("%Kcall to %qs declared with attribute error: %s",
10833 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10834 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10836 && (attr = lookup_attribute ("warning",
10837 DECL_ATTRIBUTES (fndecl))) != NULL)
10838 warning_at (tree_nonartificial_location (exp),
10839 0, "%Kcall to %qs declared with attribute warning: %s",
10840 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10841 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10843 /* Check for a built-in function. */
10844 if (fndecl && DECL_BUILT_IN (fndecl))
10846 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10847 if (CALL_WITH_BOUNDS_P (exp))
10848 return expand_builtin_with_bounds (exp, target, subtarget,
10851 return expand_builtin (exp, target, subtarget, tmode, ignore);
10854 return expand_call (exp, target, ignore);
10856 case VIEW_CONVERT_EXPR:
10859 /* If we are converting to BLKmode, try to avoid an intermediate
10860 temporary by fetching an inner memory reference. */
10861 if (mode == BLKmode
10862 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10863 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10864 && handled_component_p (treeop0))
10866 machine_mode mode1;
10867 HOST_WIDE_INT bitsize, bitpos;
10869 int unsignedp, reversep, volatilep = 0;
10871 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1,
10872 &unsignedp, &reversep, &volatilep);
10875 /* ??? We should work harder and deal with non-zero offsets. */
10877 && (bitpos % BITS_PER_UNIT) == 0
10880 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10882 /* See the normal_inner_ref case for the rationale. */
10884 = expand_expr_real (tem,
10885 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10886 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10888 && modifier != EXPAND_STACK_PARM
10889 ? target : NULL_RTX),
10891 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10894 if (MEM_P (orig_op0))
10898 /* Get a reference to just this component. */
10899 if (modifier == EXPAND_CONST_ADDRESS
10900 || modifier == EXPAND_SUM
10901 || modifier == EXPAND_INITIALIZER)
10902 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10904 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10906 if (op0 == orig_op0)
10907 op0 = copy_rtx (op0);
10909 set_mem_attributes (op0, treeop0, 0);
10910 if (REG_P (XEXP (op0, 0)))
10911 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10913 MEM_VOLATILE_P (op0) |= volatilep;
10919 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
10920 NULL, inner_reference_p);
10922 /* If the input and output modes are both the same, we are done. */
10923 if (mode == GET_MODE (op0))
10925 /* If neither mode is BLKmode, and both modes are the same size
10926 then we can use gen_lowpart. */
10927 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10928 && (GET_MODE_PRECISION (mode)
10929 == GET_MODE_PRECISION (GET_MODE (op0)))
10930 && !COMPLEX_MODE_P (GET_MODE (op0)))
10932 if (GET_CODE (op0) == SUBREG)
10933 op0 = force_reg (GET_MODE (op0), op0);
10934 temp = gen_lowpart_common (mode, op0);
10939 if (!REG_P (op0) && !MEM_P (op0))
10940 op0 = force_reg (GET_MODE (op0), op0);
10941 op0 = gen_lowpart (mode, op0);
10944 /* If both types are integral, convert from one mode to the other. */
10945 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10946 op0 = convert_modes (mode, GET_MODE (op0), op0,
10947 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10948 /* If the output type is a bit-field type, do an extraction. */
10949 else if (reduce_bit_field)
10950 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
10951 TYPE_UNSIGNED (type), NULL_RTX,
10952 mode, mode, false, NULL);
10953 /* As a last resort, spill op0 to memory, and reload it in a
10955 else if (!MEM_P (op0))
10957 /* If the operand is not a MEM, force it into memory. Since we
10958 are going to be changing the mode of the MEM, don't call
10959 force_const_mem for constants because we don't allow pool
10960 constants to change mode. */
10961 tree inner_type = TREE_TYPE (treeop0);
10963 gcc_assert (!TREE_ADDRESSABLE (exp));
10965 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10967 = assign_stack_temp_for_type
10968 (TYPE_MODE (inner_type),
10969 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10971 emit_move_insn (target, op0);
10975 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10976 output type is such that the operand is known to be aligned, indicate
10977 that it is. Otherwise, we need only be concerned about alignment for
10978 non-BLKmode results. */
10981 enum insn_code icode;
10983 if (modifier != EXPAND_WRITE
10984 && modifier != EXPAND_MEMORY
10985 && !inner_reference_p
10987 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10989 /* If the target does have special handling for unaligned
10990 loads of mode then use them. */
10991 if ((icode = optab_handler (movmisalign_optab, mode))
10992 != CODE_FOR_nothing)
10996 op0 = adjust_address (op0, mode, 0);
10997 /* We've already validated the memory, and we're creating a
10998 new pseudo destination. The predicates really can't
11000 reg = gen_reg_rtx (mode);
11002 /* Nor can the insn generator. */
11003 rtx_insn *insn = GEN_FCN (icode) (reg, op0);
11007 else if (STRICT_ALIGNMENT)
11009 tree inner_type = TREE_TYPE (treeop0);
11010 HOST_WIDE_INT temp_size
11011 = MAX (int_size_in_bytes (inner_type),
11012 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
11014 = assign_stack_temp_for_type (mode, temp_size, type);
11015 rtx new_with_op0_mode
11016 = adjust_address (new_rtx, GET_MODE (op0), 0);
11018 gcc_assert (!TREE_ADDRESSABLE (exp));
11020 if (GET_MODE (op0) == BLKmode)
11021 emit_block_move (new_with_op0_mode, op0,
11022 GEN_INT (GET_MODE_SIZE (mode)),
11023 (modifier == EXPAND_STACK_PARM
11024 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
11026 emit_move_insn (new_with_op0_mode, op0);
11032 op0 = adjust_address (op0, mode, 0);
11039 tree lhs = treeop0;
11040 tree rhs = treeop1;
11041 gcc_assert (ignore);
11043 /* Check for |= or &= of a bitfield of size one into another bitfield
11044 of size 1. In this case, (unless we need the result of the
11045 assignment) we can do this more efficiently with a
11046 test followed by an assignment, if necessary.
11048 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11049 things change so we do, this code should be enhanced to
11051 if (TREE_CODE (lhs) == COMPONENT_REF
11052 && (TREE_CODE (rhs) == BIT_IOR_EXPR
11053 || TREE_CODE (rhs) == BIT_AND_EXPR)
11054 && TREE_OPERAND (rhs, 0) == lhs
11055 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
11056 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
11057 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
11059 rtx_code_label *label = gen_label_rtx ();
11060 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
11061 do_jump (TREE_OPERAND (rhs, 1),
11064 profile_probability::uninitialized ());
11065 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
11067 do_pending_stack_adjust ();
11068 emit_label (label);
11072 expand_assignment (lhs, rhs, false);
11077 return expand_expr_addr_expr (exp, target, tmode, modifier);
11079 case REALPART_EXPR:
11080 op0 = expand_normal (treeop0);
11081 return read_complex_part (op0, false);
11083 case IMAGPART_EXPR:
11084 op0 = expand_normal (treeop0);
11085 return read_complex_part (op0, true);
11092 /* Expanded in cfgexpand.c. */
11093 gcc_unreachable ();
11095 case TRY_CATCH_EXPR:
11097 case EH_FILTER_EXPR:
11098 case TRY_FINALLY_EXPR:
11099 /* Lowered by tree-eh.c. */
11100 gcc_unreachable ();
11102 case WITH_CLEANUP_EXPR:
11103 case CLEANUP_POINT_EXPR:
11105 case CASE_LABEL_EXPR:
11110 case COMPOUND_EXPR:
11111 case PREINCREMENT_EXPR:
11112 case PREDECREMENT_EXPR:
11113 case POSTINCREMENT_EXPR:
11114 case POSTDECREMENT_EXPR:
11117 case COMPOUND_LITERAL_EXPR:
11118 /* Lowered by gimplify.c. */
11119 gcc_unreachable ();
11122 /* Function descriptors are not valid except for as
11123 initialization constants, and should not be expanded. */
11124 gcc_unreachable ();
11126 case WITH_SIZE_EXPR:
11127 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11128 have pulled out the size to use in whatever context it needed. */
11129 return expand_expr_real (treeop0, original_target, tmode,
11130 modifier, alt_rtl, inner_reference_p);
11133 return expand_expr_real_2 (&ops, target, tmode, modifier);
11137 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11138 signedness of TYPE), possibly returning the result in TARGET.
11139 TYPE is known to be a partial integer type. */
11141 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
11143 HOST_WIDE_INT prec = TYPE_PRECISION (type);
11144 if (target && GET_MODE (target) != GET_MODE (exp))
11146 /* For constant values, reduce using build_int_cst_type. */
11147 if (CONST_INT_P (exp))
11149 HOST_WIDE_INT value = INTVAL (exp);
11150 tree t = build_int_cst_type (type, value);
11151 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
11153 else if (TYPE_UNSIGNED (type))
11155 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11156 rtx mask = immed_wide_int_const
11157 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
11158 return expand_and (mode, exp, mask, target);
11162 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11163 int count = GET_MODE_PRECISION (mode) - prec;
11164 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0);
11165 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
11169 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11170 when applied to the address of EXP produces an address known to be
11171 aligned more than BIGGEST_ALIGNMENT. */
11174 is_aligning_offset (const_tree offset, const_tree exp)
11176 /* Strip off any conversions. */
11177 while (CONVERT_EXPR_P (offset))
11178 offset = TREE_OPERAND (offset, 0);
11180 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11181 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11182 if (TREE_CODE (offset) != BIT_AND_EXPR
11183 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
11184 || compare_tree_int (TREE_OPERAND (offset, 1),
11185 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
11186 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1))
11189 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11190 It must be NEGATE_EXPR. Then strip any more conversions. */
11191 offset = TREE_OPERAND (offset, 0);
11192 while (CONVERT_EXPR_P (offset))
11193 offset = TREE_OPERAND (offset, 0);
11195 if (TREE_CODE (offset) != NEGATE_EXPR)
11198 offset = TREE_OPERAND (offset, 0);
11199 while (CONVERT_EXPR_P (offset))
11200 offset = TREE_OPERAND (offset, 0);
11202 /* This must now be the address of EXP. */
11203 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
11206 /* Return the tree node if an ARG corresponds to a string constant or zero
11207 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11208 in bytes within the string that ARG is accessing. The type of the
11209 offset will be `sizetype'. */
11212 string_constant (tree arg, tree *ptr_offset)
11214 tree array, offset, lower_bound;
11217 if (TREE_CODE (arg) == ADDR_EXPR)
11219 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
11221 *ptr_offset = size_zero_node;
11222 return TREE_OPERAND (arg, 0);
11224 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
11226 array = TREE_OPERAND (arg, 0);
11227 offset = size_zero_node;
11229 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
11231 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11232 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11233 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11236 /* Check if the array has a nonzero lower bound. */
11237 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
11238 if (!integer_zerop (lower_bound))
11240 /* If the offset and base aren't both constants, return 0. */
11241 if (TREE_CODE (lower_bound) != INTEGER_CST)
11243 if (TREE_CODE (offset) != INTEGER_CST)
11245 /* Adjust offset by the lower bound. */
11246 offset = size_diffop (fold_convert (sizetype, offset),
11247 fold_convert (sizetype, lower_bound));
11250 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
11252 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11253 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11254 if (TREE_CODE (array) != ADDR_EXPR)
11256 array = TREE_OPERAND (array, 0);
11257 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11263 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
11265 tree arg0 = TREE_OPERAND (arg, 0);
11266 tree arg1 = TREE_OPERAND (arg, 1);
11271 if (TREE_CODE (arg0) == ADDR_EXPR
11272 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
11273 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
11275 array = TREE_OPERAND (arg0, 0);
11278 else if (TREE_CODE (arg1) == ADDR_EXPR
11279 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
11280 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
11282 array = TREE_OPERAND (arg1, 0);
11291 if (TREE_CODE (array) == STRING_CST)
11293 *ptr_offset = fold_convert (sizetype, offset);
11296 else if (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
11299 tree init = ctor_for_folding (array);
11301 /* Variables initialized to string literals can be handled too. */
11302 if (init == error_mark_node
11304 || TREE_CODE (init) != STRING_CST)
11307 /* Avoid const char foo[4] = "abcde"; */
11308 if (DECL_SIZE_UNIT (array) == NULL_TREE
11309 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
11310 || (length = TREE_STRING_LENGTH (init)) <= 0
11311 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
11314 /* If variable is bigger than the string literal, OFFSET must be constant
11315 and inside of the bounds of the string literal. */
11316 offset = fold_convert (sizetype, offset);
11317 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
11318 && (! tree_fits_uhwi_p (offset)
11319 || compare_tree_int (offset, length) >= 0))
11322 *ptr_offset = offset;
11329 /* Generate code to calculate OPS, and exploded expression
11330 using a store-flag instruction and return an rtx for the result.
11331 OPS reflects a comparison.
11333 If TARGET is nonzero, store the result there if convenient.
11335 Return zero if there is no suitable set-flag instruction
11336 available on this machine.
11338 Once expand_expr has been called on the arguments of the comparison,
11339 we are committed to doing the store flag, since it is not safe to
11340 re-evaluate the expression. We emit the store-flag insn by calling
11341 emit_store_flag, but only expand the arguments if we have a reason
11342 to believe that emit_store_flag will be successful. If we think that
11343 it will, but it isn't, we have to simulate the store-flag with a
11344 set/jump/set sequence. */
11347 do_store_flag (sepops ops, rtx target, machine_mode mode)
11349 enum rtx_code code;
11350 tree arg0, arg1, type;
11351 machine_mode operand_mode;
11354 rtx subtarget = target;
11355 location_t loc = ops->location;
11360 /* Don't crash if the comparison was erroneous. */
11361 if (arg0 == error_mark_node || arg1 == error_mark_node)
11364 type = TREE_TYPE (arg0);
11365 operand_mode = TYPE_MODE (type);
11366 unsignedp = TYPE_UNSIGNED (type);
11368 /* We won't bother with BLKmode store-flag operations because it would mean
11369 passing a lot of information to emit_store_flag. */
11370 if (operand_mode == BLKmode)
11373 /* We won't bother with store-flag operations involving function pointers
11374 when function pointers must be canonicalized before comparisons. */
11375 if (targetm.have_canonicalize_funcptr_for_compare ()
11376 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
11377 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
11379 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
11380 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
11381 == FUNCTION_TYPE))))
11387 /* For vector typed comparisons emit code to generate the desired
11388 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11389 expander for this. */
11390 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11392 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11393 if (VECTOR_BOOLEAN_TYPE_P (ops->type)
11394 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code))
11395 return expand_vec_cmp_expr (ops->type, ifexp, target);
11398 tree if_true = constant_boolean_node (true, ops->type);
11399 tree if_false = constant_boolean_node (false, ops->type);
11400 return expand_vec_cond_expr (ops->type, ifexp, if_true,
11405 /* Get the rtx comparison code to use. We know that EXP is a comparison
11406 operation of some type. Some comparisons against 1 and -1 can be
11407 converted to comparisons with zero. Do so here so that the tests
11408 below will be aware that we have a comparison with zero. These
11409 tests will not catch constants in the first operand, but constants
11410 are rarely passed as the first operand. */
11421 if (integer_onep (arg1))
11422 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11424 code = unsignedp ? LTU : LT;
11427 if (! unsignedp && integer_all_onesp (arg1))
11428 arg1 = integer_zero_node, code = LT;
11430 code = unsignedp ? LEU : LE;
11433 if (! unsignedp && integer_all_onesp (arg1))
11434 arg1 = integer_zero_node, code = GE;
11436 code = unsignedp ? GTU : GT;
11439 if (integer_onep (arg1))
11440 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11442 code = unsignedp ? GEU : GE;
11445 case UNORDERED_EXPR:
11471 gcc_unreachable ();
11474 /* Put a constant second. */
11475 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11476 || TREE_CODE (arg0) == FIXED_CST)
11478 std::swap (arg0, arg1);
11479 code = swap_condition (code);
11482 /* If this is an equality or inequality test of a single bit, we can
11483 do this by shifting the bit being tested to the low-order bit and
11484 masking the result with the constant 1. If the condition was EQ,
11485 we xor it with 1. This does not require an scc insn and is faster
11486 than an scc insn even if we have it.
11488 The code to make this transformation was moved into fold_single_bit_test,
11489 so we just call into the folder and expand its result. */
11491 if ((code == NE || code == EQ)
11492 && integer_zerop (arg1)
11493 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11495 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11497 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11499 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11500 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11501 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11502 gimple_assign_rhs1 (srcstmt),
11503 gimple_assign_rhs2 (srcstmt));
11504 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11506 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11510 if (! get_subtarget (target)
11511 || GET_MODE (subtarget) != operand_mode)
11514 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11517 target = gen_reg_rtx (mode);
11519 /* Try a cstore if possible. */
11520 return emit_store_flag_force (target, code, op0, op1,
11521 operand_mode, unsignedp,
11522 (TYPE_PRECISION (ops->type) == 1
11523 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11526 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11527 0 otherwise (i.e. if there is no casesi instruction).
11529 DEFAULT_PROBABILITY is the probability of jumping to the default
11532 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11533 rtx table_label, rtx default_label, rtx fallback_label,
11534 profile_probability default_probability)
11536 struct expand_operand ops[5];
11537 scalar_int_mode index_mode = SImode;
11538 rtx op1, op2, index;
11540 if (! targetm.have_casesi ())
11543 /* The index must be some form of integer. Convert it to SImode. */
11544 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type);
11545 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode))
11547 rtx rangertx = expand_normal (range);
11549 /* We must handle the endpoints in the original mode. */
11550 index_expr = build2 (MINUS_EXPR, index_type,
11551 index_expr, minval);
11552 minval = integer_zero_node;
11553 index = expand_normal (index_expr);
11555 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11556 omode, 1, default_label,
11557 default_probability);
11558 /* Now we can safely truncate. */
11559 index = convert_to_mode (index_mode, index, 0);
11563 if (omode != index_mode)
11565 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11566 index_expr = fold_convert (index_type, index_expr);
11569 index = expand_normal (index_expr);
11572 do_pending_stack_adjust ();
11574 op1 = expand_normal (minval);
11575 op2 = expand_normal (range);
11577 create_input_operand (&ops[0], index, index_mode);
11578 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11579 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11580 create_fixed_operand (&ops[3], table_label);
11581 create_fixed_operand (&ops[4], (default_label
11583 : fallback_label));
11584 expand_jump_insn (targetm.code_for_casesi, 5, ops);
11588 /* Attempt to generate a tablejump instruction; same concept. */
11589 /* Subroutine of the next function.
11591 INDEX is the value being switched on, with the lowest value
11592 in the table already subtracted.
11593 MODE is its expected mode (needed if INDEX is constant).
11594 RANGE is the length of the jump table.
11595 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11597 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11598 index value is out of range.
11599 DEFAULT_PROBABILITY is the probability of jumping to
11600 the default label. */
11603 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11604 rtx default_label, profile_probability default_probability)
11608 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11609 cfun->cfg->max_jumptable_ents = INTVAL (range);
11611 /* Do an unsigned comparison (in the proper mode) between the index
11612 expression and the value which represents the length of the range.
11613 Since we just finished subtracting the lower bound of the range
11614 from the index expression, this comparison allows us to simultaneously
11615 check that the original index expression value is both greater than
11616 or equal to the minimum value of the range and less than or equal to
11617 the maximum value of the range. */
11620 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11621 default_label, default_probability);
11624 /* If index is in range, it must fit in Pmode.
11625 Convert to Pmode so we can index with it. */
11627 index = convert_to_mode (Pmode, index, 1);
11629 /* Don't let a MEM slip through, because then INDEX that comes
11630 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11631 and break_out_memory_refs will go to work on it and mess it up. */
11632 #ifdef PIC_CASE_VECTOR_ADDRESS
11633 if (flag_pic && !REG_P (index))
11634 index = copy_to_mode_reg (Pmode, index);
11637 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11638 GET_MODE_SIZE, because this indicates how large insns are. The other
11639 uses should all be Pmode, because they are addresses. This code
11640 could fail if addresses and insns are not the same size. */
11641 index = simplify_gen_binary (MULT, Pmode, index,
11642 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11644 index = simplify_gen_binary (PLUS, Pmode, index,
11645 gen_rtx_LABEL_REF (Pmode, table_label));
11647 #ifdef PIC_CASE_VECTOR_ADDRESS
11649 index = PIC_CASE_VECTOR_ADDRESS (index);
11652 index = memory_address (CASE_VECTOR_MODE, index);
11653 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11654 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11655 convert_move (temp, vector, 0);
11657 emit_jump_insn (targetm.gen_tablejump (temp, table_label));
11659 /* If we are generating PIC code or if the table is PC-relative, the
11660 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11661 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11666 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11667 rtx table_label, rtx default_label,
11668 profile_probability default_probability)
11672 if (! targetm.have_tablejump ())
11675 index_expr = fold_build2 (MINUS_EXPR, index_type,
11676 fold_convert (index_type, index_expr),
11677 fold_convert (index_type, minval));
11678 index = expand_normal (index_expr);
11679 do_pending_stack_adjust ();
11681 do_tablejump (index, TYPE_MODE (index_type),
11682 convert_modes (TYPE_MODE (index_type),
11683 TYPE_MODE (TREE_TYPE (range)),
11684 expand_normal (range),
11685 TYPE_UNSIGNED (TREE_TYPE (range))),
11686 table_label, default_label, default_probability);
11690 /* Return a CONST_VECTOR rtx representing vector mask for
11691 a VECTOR_CST of booleans. */
11693 const_vector_mask_from_tree (tree exp)
11698 machine_mode inner, mode;
11700 mode = TYPE_MODE (TREE_TYPE (exp));
11701 units = VECTOR_CST_NELTS (exp);
11702 inner = GET_MODE_INNER (mode);
11704 v = rtvec_alloc (units);
11706 for (i = 0; i < units; ++i)
11708 elt = VECTOR_CST_ELT (exp, i);
11710 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11711 if (integer_zerop (elt))
11712 RTVEC_ELT (v, i) = CONST0_RTX (inner);
11713 else if (integer_onep (elt)
11714 || integer_minus_onep (elt))
11715 RTVEC_ELT (v, i) = CONSTM1_RTX (inner);
11717 gcc_unreachable ();
11720 return gen_rtx_CONST_VECTOR (mode, v);
11723 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11724 Return a constant scalar rtx of mode MODE in which bit X is set if element
11725 X of EXP is nonzero. */
11727 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp)
11729 wide_int res = wi::zero (GET_MODE_PRECISION (mode));
11733 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11735 elt = VECTOR_CST_ELT (exp, i);
11736 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11737 if (integer_all_onesp (elt))
11738 res = wi::set_bit (res, i);
11740 gcc_assert (integer_zerop (elt));
11743 return immed_wide_int_const (res, mode);
11746 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11748 const_vector_from_tree (tree exp)
11753 machine_mode inner, mode;
11755 mode = TYPE_MODE (TREE_TYPE (exp));
11757 if (initializer_zerop (exp))
11758 return CONST0_RTX (mode);
11760 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
11761 return const_vector_mask_from_tree (exp);
11763 units = VECTOR_CST_NELTS (exp);
11764 inner = GET_MODE_INNER (mode);
11766 v = rtvec_alloc (units);
11768 for (i = 0; i < units; ++i)
11770 elt = VECTOR_CST_ELT (exp, i);
11772 if (TREE_CODE (elt) == REAL_CST)
11773 RTVEC_ELT (v, i) = const_double_from_real_value (TREE_REAL_CST (elt),
11775 else if (TREE_CODE (elt) == FIXED_CST)
11776 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11779 RTVEC_ELT (v, i) = immed_wide_int_const (wi::to_wide (elt), inner);
11782 return gen_rtx_CONST_VECTOR (mode, v);
11785 /* Build a decl for a personality function given a language prefix. */
11788 build_personality_function (const char *lang)
11790 const char *unwind_and_version;
11794 switch (targetm_common.except_unwind_info (&global_options))
11799 unwind_and_version = "_sj0";
11803 unwind_and_version = "_v0";
11806 unwind_and_version = "_seh0";
11809 gcc_unreachable ();
11812 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11814 type = build_function_type_list (integer_type_node, integer_type_node,
11815 long_long_unsigned_type_node,
11816 ptr_type_node, ptr_type_node, NULL_TREE);
11817 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11818 get_identifier (name), type);
11819 DECL_ARTIFICIAL (decl) = 1;
11820 DECL_EXTERNAL (decl) = 1;
11821 TREE_PUBLIC (decl) = 1;
11823 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11824 are the flags assigned by targetm.encode_section_info. */
11825 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11830 /* Extracts the personality function of DECL and returns the corresponding
11834 get_personality_function (tree decl)
11836 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11837 enum eh_personality_kind pk;
11839 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11840 if (pk == eh_personality_none)
11844 && pk == eh_personality_any)
11845 personality = lang_hooks.eh_personality ();
11847 if (pk == eh_personality_lang)
11848 gcc_assert (personality != NULL_TREE);
11850 return XEXP (DECL_RTL (personality), 0);
11853 /* Returns a tree for the size of EXP in bytes. */
11856 tree_expr_size (const_tree exp)
11859 && DECL_SIZE_UNIT (exp) != 0)
11860 return DECL_SIZE_UNIT (exp);
11862 return size_in_bytes (TREE_TYPE (exp));
11865 /* Return an rtx for the size in bytes of the value of EXP. */
11868 expr_size (tree exp)
11872 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11873 size = TREE_OPERAND (exp, 1);
11876 size = tree_expr_size (exp);
11878 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
11881 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
11884 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11885 if the size can vary or is larger than an integer. */
11887 static HOST_WIDE_INT
11888 int_expr_size (tree exp)
11892 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
11893 size = TREE_OPERAND (exp, 1);
11896 size = tree_expr_size (exp);
11900 if (size == 0 || !tree_fits_shwi_p (size))
11903 return tree_to_shwi (size);