From 0051c61d93e8cedf65b4c5fed6dcb27032d99d34 Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Fri, 3 Apr 2020 12:52:17 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen --- 30/d984386e1cc797a2f520c2c7d8e5f2839651b7 | 75 +++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 30/d984386e1cc797a2f520c2c7d8e5f2839651b7 diff --git a/30/d984386e1cc797a2f520c2c7d8e5f2839651b7 b/30/d984386e1cc797a2f520c2c7d8e5f2839651b7 new file mode 100644 index 0000000..4eb4940 --- /dev/null +++ b/30/d984386e1cc797a2f520c2c7d8e5f2839651b7 @@ -0,0 +1,75 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 03 Apr 2020 13:52:20 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jKLo3-00018C-9O; Fri, 03 Apr 2020 13:52:19 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) id 1jKLo0-00017u-PU + for libre-riscv-dev@lists.libre-riscv.org; Fri, 03 Apr 2020 13:52:16 +0100 +From: bugzilla-daemon@libre-riscv.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 03 Apr 2020 12:52:17 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: whitequark@whitequark.org +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: http://bugs.libre-riscv.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNzYKCi0tLSBDb21t +ZW50ICM0IGZyb20gd2hpdGVxdWFya0B3aGl0ZXF1YXJrLm9yZyAtLS0KQWgsIHRoZXJlJ3MgYW5v +dGhlciBvcHRpb24gdGhhdCB5b3UgbWlnaHQgZmluZCBpbnRlcmVzdGluZy4gWW9zeXMgaGFzIGEg +YCRzcmAKY29hcnNlIGNlbGwuIElmIHlvdSdyZSB3aWxsaW5nIHRvIGZvcmdvIHB5c2ltIGNvbXBs +ZXRlbHkgYW5kIGdldCBjeHhzaW0gd29ya2luZwpmb3IgeW91LCB0aGVuIEkgY291bGQgaW1wbGVt +ZW50IHN1cHBvcnQgZm9yIHRoYXQgY2VsbCBpbiBjeHhzaW0uIEl0IHdvdWxkCnByb2JhYmx5IGJl +IHRoZSBsZWFzdCBhbW91bnQgb2Ygd29yayBvdXQgb2YgZXZlcnkgZGlzY3Vzc2VkIG9wdGlvbiwg +cHJvdmlkZWQKdGhhdCB5b3UgY2FuIGdldCBjeHhzaW0gd29ya2luZyBmb3IgeW91LgoKT2YgY291 +cnNlLCB5b3UgbWlnaHQgd2FudCB0byBsb29rIGludG8gY3h4c2ltIGFueXdheSBnaXZlbiB0aGUg +bWFzc2l2ZQpwZXJmb3JtYW5jZSBpbXByb3ZlbWVudHMgaXQgcHJvbWlzZXMgKG9uIGZ1bGx5IHN5 +bmNocm9ub3VzIGRlc2lnbnMsIGl0J3MKYWN0dWFsbHkgY29tcGV0aXRpdmUgd2l0aCBzaW5nbGUt +dGhyZWFkZWQgVmVyaWxhdG9yIGdlbmVyYXRlZCBjb2RlOyBvbiBkZXNpZ25zCndpdGggZmVlZGJh +Y2sgYXJjcyBwZXJmb3JtYW5jZSB3aWxsIGRlZ3JhZGUgYnkgdGhlIGFib3ZlLW1lbnRpb25lZCBm +YWN0b3Igb2YKYWJvdXQgNS0xMHgsIGJ1dCBzdGlsbCBxdWl0ZSBmYXN0LikKCi0tIApZb3UgYXJl +IHJlY2VpdmluZyB0aGlzIG1haWwgYmVjYXVzZToKWW91IGFyZSBvbiB0aGUgQ0MgbGlzdCBmb3Ig +dGhlIGJ1Zy4KX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K +bGlicmUtcmlzY3YtZGV2IG1haWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUt +cmlzY3Yub3JnCmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9s +aWJyZS1yaXNjdi1kZXYK + -- 2.30.2