From 005ba29c18d3f9a2c9a3dd40c6dee0b87ff504c5 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Wed, 30 Aug 2017 11:20:40 +0000 Subject: [PATCH] [73/77] Pass scalar_mode to scalar_mode_supported_p This patch makes the preferred_simd_mode target hook take a scalar_mode rather than a machine_mode. 2017-08-30 Richard Sandiford Alan Hayward David Sherwood gcc/ * target.def (preferred_simd_mode): Take a scalar_mode instead of a machine_mode. * targhooks.h (default_preferred_simd_mode): Likewise. * targhooks.c (default_preferred_simd_mode): Likewise. * config/arc/arc.c (arc_preferred_simd_mode): Likewise. * config/arm/arm.c (arm_preferred_simd_mode): Likewise. * config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise. * config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise. * config/i386/i386.c (ix86_preferred_simd_mode): Likewise. * config/mips/mips.c (mips_preferred_simd_mode): Likewise. * config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode): Likewise. * config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise. * config/s390/s390.c (s390_preferred_simd_mode): Likewise. * config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise. * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise. (aarch64_simd_scalar_immediate_valid_for_move): Update accordingly. * doc/tm.texi: Regenerate. * optabs-query.c (can_vec_mask_load_store_p): Return false for non-scalar modes. Co-Authored-By: Alan Hayward Co-Authored-By: David Sherwood From-SVN: r251524 --- gcc/ChangeLog | 26 ++++++++++++++++++++++++++ gcc/config/aarch64/aarch64.c | 4 ++-- gcc/config/arc/arc.c | 2 +- gcc/config/arm/arm.c | 4 ++-- gcc/config/c6x/c6x.c | 2 +- gcc/config/epiphany/epiphany.c | 2 +- gcc/config/i386/i386.c | 2 +- gcc/config/mips/mips.c | 2 +- gcc/config/nvptx/nvptx.c | 2 +- gcc/config/powerpcspe/powerpcspe.c | 2 +- gcc/config/rs6000/rs6000.c | 2 +- gcc/config/s390/s390.c | 2 +- gcc/config/sparc/sparc.c | 4 ++-- gcc/doc/tm.texi | 2 +- gcc/optabs-query.c | 10 +++++++--- gcc/target.def | 2 +- gcc/targhooks.c | 2 +- gcc/targhooks.h | 2 +- 18 files changed, 52 insertions(+), 22 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index caaa95d7dcf..95e24a3c47d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,29 @@ +2017-08-30 Richard Sandiford + Alan Hayward + David Sherwood + + * target.def (preferred_simd_mode): Take a scalar_mode + instead of a machine_mode. + * targhooks.h (default_preferred_simd_mode): Likewise. + * targhooks.c (default_preferred_simd_mode): Likewise. + * config/arc/arc.c (arc_preferred_simd_mode): Likewise. + * config/arm/arm.c (arm_preferred_simd_mode): Likewise. + * config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise. + * config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise. + * config/i386/i386.c (ix86_preferred_simd_mode): Likewise. + * config/mips/mips.c (mips_preferred_simd_mode): Likewise. + * config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise. + * config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode): + Likewise. + * config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise. + * config/s390/s390.c (s390_preferred_simd_mode): Likewise. + * config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise. + * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise. + (aarch64_simd_scalar_immediate_valid_for_move): Update accordingly. + * doc/tm.texi: Regenerate. + * optabs-query.c (can_vec_mask_load_store_p): Return false for + non-scalar modes. + 2017-08-30 Richard Sandiford Alan Hayward David Sherwood diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 88e675b807b..aede22ceaf5 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -11263,7 +11263,7 @@ aarch64_simd_container_mode (machine_mode mode, unsigned width) /* Return 128-bit container as the preferred SIMD mode for MODE. */ static machine_mode -aarch64_preferred_simd_mode (machine_mode mode) +aarch64_preferred_simd_mode (scalar_mode mode) { return aarch64_simd_container_mode (mode, 128); } @@ -11693,7 +11693,7 @@ aarch64_simd_scalar_immediate_valid_for_move (rtx op, machine_mode mode) machine_mode vmode; gcc_assert (!VECTOR_MODE_P (mode)); - vmode = aarch64_preferred_simd_mode (mode); + vmode = aarch64_preferred_simd_mode (as_a (mode)); rtx op_v = aarch64_simd_gen_const_vector_dup (vmode, INTVAL (op)); return aarch64_simd_valid_immediate (op_v, vmode, false, NULL); } diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 1f5c6dfe9b9..9b83a46e60a 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -332,7 +332,7 @@ arc_vector_mode_supported_p (machine_mode mode) /* Implements target hook TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */ static machine_mode -arc_preferred_simd_mode (machine_mode mode) +arc_preferred_simd_mode (scalar_mode mode) { switch (mode) { diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 7e0e9514d01..14c8b8c6235 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -269,7 +269,7 @@ static bool xscale_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *); static bool fa726te_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *); static bool arm_array_mode_supported_p (machine_mode, unsigned HOST_WIDE_INT); -static machine_mode arm_preferred_simd_mode (machine_mode); +static machine_mode arm_preferred_simd_mode (scalar_mode); static bool arm_class_likely_spilled_p (reg_class_t); static HOST_WIDE_INT arm_vector_alignment (const_tree type); static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); @@ -26950,7 +26950,7 @@ arm_array_mode_supported_p (machine_mode mode, widths are supported properly by the middle-end. */ static machine_mode -arm_preferred_simd_mode (machine_mode mode) +arm_preferred_simd_mode (scalar_mode mode) { if (TARGET_NEON) switch (mode) diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c index bf7ec7e4b00..b4545aaa4d8 100644 --- a/gcc/config/c6x/c6x.c +++ b/gcc/config/c6x/c6x.c @@ -6239,7 +6239,7 @@ c6x_vector_mode_supported_p (machine_mode mode) /* Implements TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */ static machine_mode -c6x_preferred_simd_mode (machine_mode mode) +c6x_preferred_simd_mode (scalar_mode mode) { switch (mode) { diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c index a35c0017396..d5d88d38f40 100644 --- a/gcc/config/epiphany/epiphany.c +++ b/gcc/config/epiphany/epiphany.c @@ -2774,7 +2774,7 @@ epiphany_min_divisions_for_recip_mul (machine_mode mode) } static machine_mode -epiphany_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED) +epiphany_preferred_simd_mode (scalar_mode mode ATTRIBUTE_UNUSED) { return TARGET_VECT_DOUBLE ? DImode : SImode; } diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7867372789a..4eaf6e0262f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -51515,7 +51515,7 @@ ix86_reassociation_width (unsigned int, machine_mode mode) place emms and femms instructions. */ static machine_mode -ix86_preferred_simd_mode (machine_mode mode) +ix86_preferred_simd_mode (scalar_mode mode) { if (!TARGET_SSE) return word_mode; diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index a810ba729fc..c80686e31bf 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -13324,7 +13324,7 @@ mips_scalar_mode_supported_p (scalar_mode mode) /* Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */ static machine_mode -mips_preferred_simd_mode (machine_mode mode) +mips_preferred_simd_mode (scalar_mode mode) { if (TARGET_PAIRED_SINGLE_FLOAT && mode == SFmode) diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c index 043d197d6a8..cd08e75c88d 100644 --- a/gcc/config/nvptx/nvptx.c +++ b/gcc/config/nvptx/nvptx.c @@ -5486,7 +5486,7 @@ nvptx_vector_mode_supported (machine_mode mode) /* Return the preferred mode for vectorizing scalar MODE. */ static machine_mode -nvptx_preferred_simd_mode (machine_mode mode) +nvptx_preferred_simd_mode (scalar_mode mode) { switch (mode) { diff --git a/gcc/config/powerpcspe/powerpcspe.c b/gcc/config/powerpcspe/powerpcspe.c index 0d8eda48dff..b3c0a9eb496 100644 --- a/gcc/config/powerpcspe/powerpcspe.c +++ b/gcc/config/powerpcspe/powerpcspe.c @@ -5877,7 +5877,7 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, /* Implement targetm.vectorize.preferred_simd_mode. */ static machine_mode -rs6000_preferred_simd_mode (machine_mode mode) +rs6000_preferred_simd_mode (scalar_mode mode) { if (TARGET_VSX) switch (mode) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 51b7ec01ca2..5116da5adc9 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5527,7 +5527,7 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, /* Implement targetm.vectorize.preferred_simd_mode. */ static machine_mode -rs6000_preferred_simd_mode (machine_mode mode) +rs6000_preferred_simd_mode (scalar_mode mode) { if (TARGET_VSX) switch (mode) diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 957cfcbbdfa..d1480f46776 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -15496,7 +15496,7 @@ s390_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) /* Return the vector mode to be used for inner mode MODE when doing vectorization. */ static machine_mode -s390_preferred_simd_mode (machine_mode mode) +s390_preferred_simd_mode (scalar_mode mode) { if (TARGET_VX) switch (mode) diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 54adb465768..50882d062e7 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -662,7 +662,7 @@ static void sparc_conditional_register_usage (void); static const char *sparc_mangle_type (const_tree); #endif static void sparc_trampoline_init (rtx, tree, rtx); -static machine_mode sparc_preferred_simd_mode (machine_mode); +static machine_mode sparc_preferred_simd_mode (scalar_mode); static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass); static bool sparc_lra_p (void); static bool sparc_print_operand_punct_valid_p (unsigned char); @@ -7694,7 +7694,7 @@ sparc_vector_mode_supported_p (machine_mode mode) /* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */ static machine_mode -sparc_preferred_simd_mode (machine_mode mode) +sparc_preferred_simd_mode (scalar_mode mode) { if (TARGET_VIS) switch (mode) diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index b1835af3bc0..ae51e75a5ea 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -5805,7 +5805,7 @@ the elements in the vectors should be of type @var{type}. @var{is_packed} parameter is true if the memory access is defined in a packed struct. @end deftypefn -@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (machine_mode @var{mode}) +@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (scalar_mode @var{mode}) This hook should return the preferred mode for vectorizing scalar mode @var{mode}. The default is equal to @code{word_mode}, because the vectorizer can do some diff --git a/gcc/optabs-query.c b/gcc/optabs-query.c index b4a4976350d..f6060731f93 100644 --- a/gcc/optabs-query.c +++ b/gcc/optabs-query.c @@ -524,7 +524,11 @@ can_vec_mask_load_store_p (machine_mode mode, /* See if there is any chance the mask load or store might be vectorized. If not, punt. */ - vmode = targetm.vectorize.preferred_simd_mode (mode); + scalar_mode smode; + if (!is_a (mode, &smode)) + return false; + + vmode = targetm.vectorize.preferred_simd_mode (smode); if (!VECTOR_MODE_P (vmode)) return false; @@ -541,9 +545,9 @@ can_vec_mask_load_store_p (machine_mode mode, { unsigned int cur = 1 << floor_log2 (vector_sizes); vector_sizes &= ~cur; - if (cur <= GET_MODE_SIZE (mode)) + if (cur <= GET_MODE_SIZE (smode)) continue; - vmode = mode_for_vector (mode, cur / GET_MODE_SIZE (mode)); + vmode = mode_for_vector (smode, cur / GET_MODE_SIZE (smode)); mask_mode = targetm.vectorize.get_mask_mode (GET_MODE_NUNITS (vmode), cur); if (VECTOR_MODE_P (vmode) diff --git a/gcc/target.def b/gcc/target.def index f8ef0d392ff..83724b303bb 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -1859,7 +1859,7 @@ mode @var{mode}. The default is\n\ equal to @code{word_mode}, because the vectorizer can do some\n\ transformations even in absence of specialized @acronym{SIMD} hardware.", machine_mode, - (machine_mode mode), + (scalar_mode mode), default_preferred_simd_mode) /* Returns a mask of vector sizes to iterate over when auto-vectorizing diff --git a/gcc/targhooks.c b/gcc/targhooks.c index 15c71cf34e8..51babfac3cf 100644 --- a/gcc/targhooks.c +++ b/gcc/targhooks.c @@ -1159,7 +1159,7 @@ default_builtin_support_vector_misalignment (machine_mode mode, possibly adds/subtracts using bit-twiddling. */ machine_mode -default_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED) +default_preferred_simd_mode (scalar_mode) { return word_mode; } diff --git a/gcc/targhooks.h b/gcc/targhooks.h index a9ae75f57f3..fa3dfac6981 100644 --- a/gcc/targhooks.h +++ b/gcc/targhooks.h @@ -100,7 +100,7 @@ extern bool default_builtin_support_vector_misalignment (machine_mode mode, const_tree, int, bool); -extern machine_mode default_preferred_simd_mode (machine_mode mode); +extern machine_mode default_preferred_simd_mode (scalar_mode mode); extern unsigned int default_autovectorize_vector_sizes (void); extern machine_mode default_get_mask_mode (unsigned, unsigned); extern void *default_init_cost (struct loop *); -- 2.30.2