From 005d9b1ada1fa3ee3fa855ee82e0b229b1458aa8 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 20 May 2019 00:46:48 +0000 Subject: [PATCH] panfrost/midgard: Remove pinning This mechanism is only used by blend shaders, so just use a move here. Ideally, it'll be copy-propped and DCE'd away; this removes a source of considerable indirection and will simplify RA logic. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Ryan Houdek --- .../panfrost/midgard/midgard_compile.c | 19 ++----------------- .../drivers/panfrost/midgard/midgard_ra.c | 10 ---------- 2 files changed, 2 insertions(+), 27 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index 048389dd8db..5f2cc4ba729 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -519,18 +519,6 @@ unalias_ssa(compiler_context *ctx, int dest) /* TODO: Remove from leftover or no? */ } -static void -midgard_pin_output(compiler_context *ctx, int index, int reg) -{ - _mesa_hash_table_u64_insert(ctx->ssa_to_register, index + 1, (void *) ((uintptr_t) reg + 1)); -} - -static bool -midgard_is_pinned(compiler_context *ctx, int index) -{ - return _mesa_hash_table_u64_search(ctx->ssa_to_register, index + 1) != NULL; -} - /* Do not actually emit a load; instead, cache the constant for inlining */ static void @@ -1267,7 +1255,8 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) /* For blend shaders, load the input color, which is * preloaded to r0 */ - midgard_pin_output(ctx, reg, 0); + midgard_instruction move = v_fmov(reg, blank_alu_src, SSA_FIXED_REGISTER(0)); + emit_mir_instruction(ctx, move); } else if (ctx->stage == MESA_SHADER_VERTEX) { midgard_instruction ins = m_ld_attr_32(reg, offset); ins.load_store.unknown = 0x1E1E; /* XXX: What is this? */ @@ -1325,8 +1314,6 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) midgard_instruction move = v_fmov(reg, blank_alu_src, SSA_FIXED_REGISTER(0)); emit_mir_instruction(ctx, move); - //midgard_pin_output(ctx, reg, 0); - /* Save the index we're writing to for later reference * in the epilogue */ @@ -2527,7 +2514,6 @@ midgard_opt_dead_code_eliminate(compiler_context *ctx, midgard_block *block) if (ins->compact_branch) continue; if (ins->ssa_args.dest >= SSA_FIXED_MINIMUM) continue; - if (midgard_is_pinned(ctx, ins->ssa_args.dest)) continue; if (mir_is_live_after(ctx, block, ins, ins->ssa_args.dest)) continue; mir_remove_instruction(ins); @@ -3120,7 +3106,6 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl ctx->ssa_constants = _mesa_hash_table_u64_create(NULL); ctx->ssa_varyings = _mesa_hash_table_u64_create(NULL); ctx->ssa_to_alias = _mesa_hash_table_u64_create(NULL); - ctx->ssa_to_register = _mesa_hash_table_u64_create(NULL); ctx->hash_to_temp = _mesa_hash_table_u64_create(NULL); ctx->sysval_to_id = _mesa_hash_table_u64_create(NULL); ctx->leftover_ssa_to_alias = _mesa_set_create(NULL, _mesa_hash_pointer, _mesa_key_pointer_equal); diff --git a/src/gallium/drivers/panfrost/midgard/midgard_ra.c b/src/gallium/drivers/panfrost/midgard/midgard_ra.c index 594cafe45ae..73e46cb0057 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_ra.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_ra.c @@ -154,16 +154,6 @@ allocate_registers(compiler_context *ctx) } } - for (int index = 0; index <= ctx->max_hash; ++index) { - unsigned temp = (uintptr_t) _mesa_hash_table_u64_search(ctx->ssa_to_register, index + 1); - - if (temp) { - unsigned reg = temp - 1; - int t = find_or_allocate_temp(ctx, index); - ra_set_node_reg(g, t, reg); - } - } - /* Determine liveness */ int *live_start = malloc(nodes * sizeof(int)); -- 2.30.2