From 0067d8fc73d10d58fe707bdbe8c5970ed80d2751 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Mon, 28 Feb 2011 16:34:39 +0000 Subject: [PATCH] opcodes/ * mips-opc.c (mips_builtin_opcodes): Correct register use annotation of "alnv.ps". gas/testsuite/ * gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction branch swapping. * gas/mips/alnv_ps-swap.s: Source for the new test. * gas/mips/mips.exp: Run the new test. --- gas/testsuite/ChangeLog | 7 +++++ gas/testsuite/gas/mips/alnv_ps-swap.d | 39 +++++++++++++++++++++++++++ gas/testsuite/gas/mips/alnv_ps-swap.s | 33 +++++++++++++++++++++++ gas/testsuite/gas/mips/mips.exp | 3 +++ opcodes/ChangeLog | 5 ++++ opcodes/mips-opc.c | 2 +- 6 files changed, 88 insertions(+), 1 deletion(-) create mode 100644 gas/testsuite/gas/mips/alnv_ps-swap.d create mode 100644 gas/testsuite/gas/mips/alnv_ps-swap.s diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c3cb1e387e7..c4fbd0a2e10 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2011-02-28 Maciej W. Rozycki + + * gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction + branch swapping. + * gas/mips/alnv_ps-swap.s: Source for the new test. + * gas/mips/mips.exp: Run the new test. + 2011-02-28 Maciej W. Rozycki * gas/mips/relax-bposge.l: New test for DSP branch relaxation. diff --git a/gas/testsuite/gas/mips/alnv_ps-swap.d b/gas/testsuite/gas/mips/alnv_ps-swap.d new file mode 100644 index 00000000000..97dd1cbb694 --- /dev/null +++ b/gas/testsuite/gas/mips/alnv_ps-swap.d @@ -0,0 +1,39 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS ALNV.PS instruction branch swapping +#as: -32 + +# Check that a register dependency between ALNV.PS and the following +# branch prevents from branch swapping. + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 1000ffff b 0+0000 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 0411fffd bal 0+0000 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 0470fffb bltzal v1,0+0000 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 0060f809 jalr v1 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 00602009 jalr a0,v1 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 4c60111e alnv\.ps \$f4,\$f2,\$f0,v1 +[0-9a-f]+ <[^>]*> 03e01809 jalr v1,ra +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 1000fff2 b 0+0000 +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 0411ffef bal 0+0000 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 0470ffec bltzal v1,0+0000 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 0060f809 jalr v1 +[0-9a-f]+ <[^>]*> 00000000 nop +[0-9a-f]+ <[^>]*> 00602009 jalr a0,v1 +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra +[0-9a-f]+ <[^>]*> 03e01809 jalr v1,ra +[0-9a-f]+ <[^>]*> 4fe0111e alnv\.ps \$f4,\$f2,\$f0,ra + \.\.\. diff --git a/gas/testsuite/gas/mips/alnv_ps-swap.s b/gas/testsuite/gas/mips/alnv_ps-swap.s new file mode 100644 index 00000000000..9d46c8515fa --- /dev/null +++ b/gas/testsuite/gas/mips/alnv_ps-swap.s @@ -0,0 +1,33 @@ +# Source file to test branch swapping with the ALNV.PS instruction. + + .text +foo: + alnv.ps $f4, $f2, $f0, $3 + b foo + alnv.ps $f4, $f2, $f0, $3 + bal foo + alnv.ps $f4, $f2, $f0, $3 + bltzal $3, foo + alnv.ps $f4, $f2, $f0, $3 + jalr $3 + alnv.ps $f4, $f2, $f0, $3 + jalr $4, $3 + alnv.ps $f4, $f2, $f0, $3 + jalr $3, $31 + + alnv.ps $f4, $f2, $f0, $31 + b foo + alnv.ps $f4, $f2, $f0, $31 + bal foo + alnv.ps $f4, $f2, $f0, $31 + bltzal $3, foo + alnv.ps $f4, $f2, $f0, $31 + jalr $3 + alnv.ps $f4, $f2, $f0, $31 + jalr $4, $3 + alnv.ps $f4, $f2, $f0, $31 + jalr $3, $31 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 2 + .space 8 diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 3fc5b61f808..f143ac3bd83 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -979,6 +979,9 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips32-sync" run_dump_test_arches "mips32r2-sync" \ [mips_arch_list_matching mips32r2] + run_dump_test_arches "alnv_ps-swap" [lsort -dictionary -unique [concat \ + [mips_arch_list_matching mips5] \ + [mips_arch_list_matching mips32r2] ] ] if $has_newabi { run_dump_test "cfi-n64-1" } } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 90dfa27158a..ba013b25924 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2011-02-28 Maciej W. Rozycki + + * mips-opc.c (mips_builtin_opcodes): Correct register use + annotation of "alnv.ps". + 2011-02-28 Maciej W. Rozycki * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 78b3fa782b4..8f51643ee47 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -297,7 +297,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 }, {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D|RD_S|RD_T, 0, N54 }, {"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_D|RD_S|RD_T|FP_D, 0, MX }, -{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, 0, I5_33 }, +{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0, I5_33 }, {"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0, MX|SB1 }, {"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_D|RD_S|RD_T|RD_s|FP_D, 0, MX }, {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, -- 2.30.2