From 00dd0d7b3d344ab102e2912fc7db824dad84f3a0 Mon Sep 17 00:00:00 2001 From: Adrian Herrera Date: Thu, 10 Dec 2020 18:07:21 +0000 Subject: [PATCH] dev-arm: SMMUv3, enable interrupt interface Users can set "irq_interface_enable" to allow software to program SMMU_IRQ_CTRL and SMMU_IRQ_CTRLACK. This is required to boot Linux v5.4+ in a reasonable time. Notice the model does not implement architectural interrupt sources, so no assertions will happen. Change-Id: Ie138befdf5a204fe8fce961081c575c2166e22b9 Signed-off-by: Adrian Herrera Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38555 Tested-by: kokoro Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg --- src/dev/arm/SMMUv3.py | 5 +++++ src/dev/arm/smmu_v3.cc | 10 +++++++++- src/dev/arm/smmu_v3.hh | 4 +++- 3 files changed, 17 insertions(+), 2 deletions(-) diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py index f53b8ecab..f444d644c 100644 --- a/src/dev/arm/SMMUv3.py +++ b/src/dev/arm/SMMUv3.py @@ -91,6 +91,11 @@ class SMMUv3(ClockedObject): reg_map = Param.AddrRange('Address range for control registers') system = Param.System(Parent.any, "System this device is part of") + irq_interface_enable = Param.Bool(False, + "This flag enables software to program SMMU_IRQ_CTRL and " + "SMMU_IRQ_CTRLACK as if the model implemented architectural " + "interrupt sources") + device_interfaces = VectorParam.SMMUv3DeviceInterface([], "Responder interfaces") diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc index 543a11a62..3076f5e59 100644 --- a/src/dev/arm/smmu_v3.cc +++ b/src/dev/arm/smmu_v3.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, 2018-2019 ARM Limited + * Copyright (c) 2013, 2018-2020 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -58,6 +58,7 @@ SMMUv3::SMMUv3(const SMMUv3Params ¶ms) : requestPort(name() + ".request", *this), tableWalkPort(name() + ".walker", *this), controlPort(name() + ".control", *this, params.reg_map), + irqInterfaceEnable(params.irq_interface_enable), tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy, this), configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy, this), ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy, this), @@ -627,6 +628,13 @@ SMMUv3::writeControl(PacketPtr pkt) assert(pkt->getSize() == sizeof(uint32_t)); regs.cr0 = regs.cr0ack = pkt->getLE(); break; + case offsetof(SMMURegs, irq_ctrl): + assert(pkt->getSize() == sizeof(uint32_t)); + if (irqInterfaceEnable) { + warn("SMMUv3::%s No support for interrupt sources", __func__); + regs.irq_ctrl = regs.irq_ctrlack = pkt->getLE(); + } + break; case offsetof(SMMURegs, cr1): case offsetof(SMMURegs, cr2): diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh index 2d9c1c57e..e20ab4dc5 100644 --- a/src/dev/arm/smmu_v3.hh +++ b/src/dev/arm/smmu_v3.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, 2018-2019 ARM Limited + * Copyright (c) 2013, 2018-2020 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -94,6 +94,8 @@ class SMMUv3 : public ClockedObject SMMUTableWalkPort tableWalkPort; SMMUControlPort controlPort; + const bool irqInterfaceEnable; + ARMArchTLB tlb; ConfigCache configCache; IPACache ipaCache; -- 2.30.2