From 00e3cc619b315a4a837ce2fa94edf7ea54117bb8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 23 Jul 2022 14:22:44 +0100 Subject: [PATCH] --- docs/pypowersim.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/docs/pypowersim.mdwn b/docs/pypowersim.mdwn index e40dbfdd8..b6ae07ab7 100644 --- a/docs/pypowersim.mdwn +++ b/docs/pypowersim.mdwn @@ -23,7 +23,9 @@ succesfully, you need to dump the memory contents and inspect the output. ISA and as a tool to check that the Power ISA Specification itself is correct. For example, a python class [SelectableInt](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/selectable_int.py;hb=HEAD) -has been created which understands IBM MSB0 ordering. This +has been created which understands IBM MSB0 ordering. Even +a RADIX MMU has been implemented, 100% in python using IBM-sponsored +[gem5-experimental](https://github.com/power-gem5/gem5/blob/gem5-experimental/src/arch/power/radixwalk.cc) work as a guide. This *deliberate and conscious* design choice to focus on readability and understanding makes pypowersim extremely slow: an Intel i9 running at 4.8 ghz is only capable of 2,500 instructions per second. -- 2.30.2