From 01044fce6b3de11635ea5078b76ffee1a33b3802 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Fri, 30 Mar 2012 13:58:06 -0700 Subject: [PATCH] i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7. According to the BSpec ISA volume's "Accumulator Register" section: "[DevIVB] SIMD16 execution on dwords is not allowed when accumulator is explicit source or destination operand." Fixes piglit tests: - fs-multiply-const-ivec4 - fs-multiply-const-uvec4 - fs-multiply-ivec4-const - fs-multiply-uvec4-const Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index b4ef80b6546..a672ee624b2 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -337,6 +337,9 @@ fs_visitor::visit(ir_expression *ir) * FINISHME: Emit just the MUL if we know an operand is small * enough. */ + if (intel->gen >= 7 && c->dispatch_width == 16) + fail("16-wide explicit accumulator operands unsupported\n"); + struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D); emit(BRW_OPCODE_MUL, acc, op[0], op[1]); -- 2.30.2