From 018ead426666d7d58517976e37f80f5de4a677cd Mon Sep 17 00:00:00 2001 From: Junwei Zhang Date: Mon, 19 Dec 2016 13:51:25 -0500 Subject: [PATCH] radeonsi: add Polaris12 support (v3) MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit v2: use gfxip names for llvm 4.0+ v3: use tonga for llvm <= 3.8, drop gfxip name, we can just change that we change the other asics. Reviewed-by: Marek Olšák Signed-off-by: Junwei Zhang Reviewed-by: Nicolai Hähnle Acked-by: Christian König --- src/amd/addrlib/r800/ciaddrlib.cpp | 3 ++- src/amd/addrlib/r800/ciaddrlib.h | 1 + src/amd/common/amd_family.h | 1 + src/amd/common/amdgpu_id.h | 4 ++++ src/gallium/drivers/radeon/r600_pipe_common.c | 3 +++ src/gallium/drivers/radeon/radeon_vce.c | 3 ++- src/gallium/drivers/radeonsi/si_pipe.c | 1 + src/gallium/drivers/radeonsi/si_state.c | 1 + src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 4 ++++ 9 files changed, 19 insertions(+), 2 deletions(-) diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 7c5d29a2166..c726c4d8dd0 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -353,6 +353,7 @@ AddrChipFamily CIAddrLib::HwlConvertChipFamily( m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision); m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision); m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision); + m_settings.isPolaris12 = ASICREV_IS_POLARIS12_V(uChipRevision); break; case FAMILY_CZ: m_settings.isCarrizo = 1; @@ -417,7 +418,7 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams( { m_pipes = 16; } - else if (m_settings.isPolaris11) + else if (m_settings.isPolaris11 || m_settings.isPolaris12) { m_pipes = 4; } diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h index de995fa4058..2c9a4cce7a6 100644 --- a/src/amd/addrlib/r800/ciaddrlib.h +++ b/src/amd/addrlib/r800/ciaddrlib.h @@ -62,6 +62,7 @@ struct CIChipSettings UINT_32 isFiji : 1; UINT_32 isPolaris10 : 1; UINT_32 isPolaris11 : 1; + UINT_32 isPolaris12 : 1; // VI fusion (Carrizo) UINT_32 isCarrizo : 1; }; diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h index 6a713ad7641..b09bbb89a3f 100644 --- a/src/amd/common/amd_family.h +++ b/src/amd/common/amd_family.h @@ -91,6 +91,7 @@ enum radeon_family { CHIP_STONEY, CHIP_POLARIS10, CHIP_POLARIS11, + CHIP_POLARIS12, CHIP_LAST, }; diff --git a/src/amd/common/amdgpu_id.h b/src/amd/common/amdgpu_id.h index f91df55711a..1683a5a746c 100644 --- a/src/amd/common/amdgpu_id.h +++ b/src/amd/common/amdgpu_id.h @@ -142,6 +142,8 @@ enum { VI_POLARIS11_M_A0 = 90, + VI_POLARIS12_V_A0 = 100, + VI_UNKNOWN = 0xFF }; @@ -156,6 +158,8 @@ enum { ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0)) #define ASICREV_IS_POLARIS11_M(eChipRev) \ (eChipRev >= VI_POLARIS11_M_A0) +#define ASICREV_IS_POLARIS12_V(eChipRev)\ + (eChipRev >= VI_POLARIS12_V_A0) /* CZ specific rev IDs */ enum { diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 0b5c6dca416..e0b914c50fd 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -755,6 +755,7 @@ static const char* r600_get_chip_name(struct r600_common_screen *rscreen) case CHIP_FIJI: return "AMD FIJI"; case CHIP_POLARIS10: return "AMD POLARIS10"; case CHIP_POLARIS11: return "AMD POLARIS11"; + case CHIP_POLARIS12: return "AMD POLARIS12"; case CHIP_STONEY: return "AMD STONEY"; default: return "AMD unknown"; } @@ -889,9 +890,11 @@ const char *r600_get_llvm_processor_name(enum radeon_family family) #if HAVE_LLVM <= 0x0308 case CHIP_POLARIS10: return "tonga"; case CHIP_POLARIS11: return "tonga"; + case CHIP_POLARIS12: return "tonga"; #else case CHIP_POLARIS10: return "polaris10"; case CHIP_POLARIS11: return "polaris11"; + case CHIP_POLARIS12: return "polaris11"; #endif default: return ""; } diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index aad2ec192f9..dcd56eaffb1 100644 --- a/src/gallium/drivers/radeon/radeon_vce.c +++ b/src/gallium/drivers/radeon/radeon_vce.c @@ -413,7 +413,8 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, enc->use_vui = true; if (rscreen->info.family >= CHIP_TONGA && rscreen->info.family != CHIP_STONEY && - rscreen->info.family != CHIP_POLARIS11) + rscreen->info.family != CHIP_POLARIS11 && + rscreen->info.family != CHIP_POLARIS12) enc->dual_pipe = true; /* TODO enable B frame with dual instance */ if ((rscreen->info.family >= CHIP_TONGA) && diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 88685f9ada8..11cca6ff521 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -734,6 +734,7 @@ static bool si_init_gs_info(struct si_screen *sscreen) case CHIP_FIJI: case CHIP_POLARIS10: case CHIP_POLARIS11: + case CHIP_POLARIS12: sscreen->gs_table_depth = 32; return true; default: diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 984540d511a..65737f4f165 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3936,6 +3936,7 @@ static void si_init_config(struct si_context *sctx) raster_config_1 = 0x0000002a; break; case CHIP_POLARIS11: + case CHIP_POLARIS12: raster_config = 0x16000012; raster_config_1 = 0x00000000; break; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 98d72bd9f2c..0f7d16183e2 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c @@ -300,6 +300,10 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) ws->family = FAMILY_VI; ws->rev_id = VI_POLARIS11_M_A0; break; + case CHIP_POLARIS12: + ws->family = FAMILY_VI; + ws->rev_id = VI_POLARIS12_V_A0; + break; default: fprintf(stderr, "amdgpu: Unknown family.\n"); goto fail; -- 2.30.2