From 0191e16d98b644e446f1e922a2e28041bf7ad20f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 1 Jun 2020 12:38:25 +0100 Subject: [PATCH] shiftrot uses LogicalOutputData not ALUOutputData --- src/soc/fu/shift_rot/pipe_data.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/fu/shift_rot/pipe_data.py b/src/soc/fu/shift_rot/pipe_data.py index ed3cd14d..49b7b9c5 100644 --- a/src/soc/fu/shift_rot/pipe_data.py +++ b/src/soc/fu/shift_rot/pipe_data.py @@ -3,7 +3,7 @@ from nmutil.dynamicpipe import SimpleHandshakeRedir from soc.fu.alu.alu_input_record import CompALUOpSubset from ieee754.fpcommon.getop import FPPipeContext from soc.fu.pipe_data import IntegerData, CommonPipeSpec -from soc.fu.alu.pipe_data import ALUOutputData +from soc.fu.logical.pipe_data import LogicalOutputData from nmutil.dynamicpipe import SimpleHandshakeRedir @@ -35,5 +35,5 @@ class ShiftRotInputData(IntegerData): # TODO: replace CompALUOpSubset with CompShiftRotOpSubset class ShiftRotPipeSpec(CommonPipeSpec): - regspec = (ShiftRotInputData.regspec, ALUOutputData.regspec) + regspec = (ShiftRotInputData.regspec, LogicalOutputData.regspec) opsubsetkls = CompALUOpSubset -- 2.30.2