From 01b225c5c008996bcca95ba574ccb59c3e5f0675 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 4 May 2022 01:25:25 +0100 Subject: [PATCH] --- openpower/sv/bitmanip.mdwn | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 4d1490878..cf5e834ce 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -367,8 +367,8 @@ generalised reverse combined with a pair of LUT2s and allowing a constant `0b0101...0101` when RA=0, and an option to invert (including when RA=0, giving a constant 0b1010...1010 as the initial value) provides a wide range of instructions -and a means to set regular 64 bit patterns in one -32 bit instruction. +and a means to set hundreds of regular 64 bit patterns with one +single 32 bit instruction. the two LUT2s are applied left-half (when not swapping) and right-half (when swapping) so as to allow a wider @@ -387,7 +387,7 @@ This only requires 2 instructions (grevlut, bext). Note that if the mask is required to be placed directly into CR Fields (for use as CR Predicate -masks rather than a integer mask) then sv.ori +masks rather than a integer mask) then sv.cmpi or sv.ori may be used instead, bearing in mind that sv.ori is a 64-bit instruction, and `VL` must have been set to the required length: -- 2.30.2