From 01b6ae3c9a5b03ac4d4d28b6dc14e3e7b729f52b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Dec 2021 12:35:02 +0000 Subject: [PATCH] construct an MSRSpec in PortInterfaceBase (not used yet) --- src/soc/experiment/pimem.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/experiment/pimem.py b/src/soc/experiment/pimem.py index 51a6abef..7e92e967 100644 --- a/src/soc/experiment/pimem.py +++ b/src/soc/experiment/pimem.py @@ -228,6 +228,7 @@ class PortInterfaceBase(Elaboratable): pr = ~pi.priv_mode dr = pi.virt_mode # not yet used sf = pi.mode_32bit # not yet used + msr = MSRSpec(pr=pr, dr=dr, sf=sf) # detect busy "edge" busy_delay = Signal() -- 2.30.2