From 01cf5831372687e6d81f6a4f6c16a73eaa5fa7f5 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 8 Jul 2022 19:54:19 +0100
Subject: [PATCH]

---
 openpower/atomics.mdwn | 23 ++++++++++++++++++++---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/openpower/atomics.mdwn b/openpower/atomics.mdwn
index 622f90519..79bfe1487 100644
--- a/openpower/atomics.mdwn
+++ b/openpower/atomics.mdwn
@@ -183,6 +183,23 @@ tried to access it.
 
 # TODO: add list of proposed instructions
 
-| 0.5|6.10|11.15|16.20|21|22|23.24|25.30 |31| name         |  Form   |
-| -- | -- | --- | --- |--|--|---- |------|--| ----         | ------- |
-| NN | RT | RA  | FC  |lr|sc|ew   |xxxxxx|/ | lat[.lr][.sc]| TODO-Form  |
+AT-Form (TODO)
+
+* lat RT,RA,FC,ew
+* lataq RT,RA,FC,ew
+* latrl RT,RA,FC,ew
+* lataqrl RT,RA,FC,ew
+
+| 0.5|6.10|11.15|16.20|21|22|23.24|25.30 |31| name       |  Form   |
+| -- | -- | --- | --- |--|--|---- |------|--| ----       | ------- |
+| NN | RT | RA  | FC  |lr|sc|ew   |xxxxxx|/ | lat[aq][rl]| TODO-Form  |
+
+* If the `aq` bit is set,
+  then no later atomic memory operations can be observed
+  to take place before the AMO.
+* If the `rl` bit is set, then other cores will not observe the AMO before 
+  memory accesses preceding the AMO.
+* Setting both the `aq` and the `rl` bit makes the sequence
+  sequentially consistent, meaning that
+  it cannot be reordered with earlier or later atomic
+  memory operations.
-- 
2.30.2