From 02363d5fdb862a11e6e65ac5b0d1f5ee0c422dc3 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 21 Jul 2020 20:22:05 +0200 Subject: [PATCH] i386: Fix insn conditions of mfence patterns [PR95750] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit 2020-07-21 Uroš Bizjak gcc/ChangeLog: PR target/95750 * config/i386/sync.md (mfence_sse2): Enable for TARGET_64BIT and TARGET_SSE2. (mfence_nosse): Always enable. --- gcc/config/i386/sync.md | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index c6827037abf..c88750d3664 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -89,8 +89,7 @@ (define_insn "mfence_sse2" [(set (match_operand:BLK 0) (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))] - "(TARGET_64BIT || TARGET_SSE2) - && !TARGET_AVOID_MFENCE" + "TARGET_64BIT || TARGET_SSE2" "mfence" [(set_attr "type" "sse") (set_attr "length_address" "0") @@ -101,8 +100,7 @@ [(set (match_operand:BLK 0) (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE)) (clobber (reg:CC FLAGS_REG))] - "!(TARGET_64BIT || TARGET_SSE2) - || TARGET_AVOID_MFENCE" + "" { rtx mem = gen_rtx_MEM (word_mode, stack_pointer_rtx); -- 2.30.2