From 0254019a6ad5294fec7a954ab1a18138a60355bb Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 27 Mar 2023 11:58:29 +0100 Subject: [PATCH] whitespace (indentation) --- openpower/sv/rfc/ls009.mdwn | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn index 45c176e57..6ed3aa5ae 100644 --- a/openpower/sv/rfc/ls009.mdwn +++ b/openpower/sv/rfc/ls009.mdwn @@ -557,7 +557,9 @@ Pseudo-code: Special Registers Altered: +``` None +``` `svremap` determines the relationship between registers and SVSHAPE SPRs. The bitmask `SVme` determines which registers have a REMAP applied, and mi0-mo1 @@ -997,7 +999,9 @@ Form: SVM-Form SV "Matrix" Form (see [[isatables/fields.text]]) Special Registers Altered: +``` None +``` `svshape` is a convenience instruction that reduces instruction count for common usage patterns, particularly Matrix, DCT and FFT. It sets up @@ -1128,7 +1132,9 @@ Pseudo-code: Special Registers Altered: +``` None +``` `svindex` is a convenience instruction that reduces instruction count for Indexed REMAP Mode. It sets up -- 2.30.2