From 028b9f7a00b7fd2ee53519cf452558bff328351d Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Fri, 27 Oct 2023 11:13:02 +0100
Subject: [PATCH] added commas

---
 openpower/isa/fixedstoreshift.mdwn | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/openpower/isa/fixedstoreshift.mdwn b/openpower/isa/fixedstoreshift.mdwn
index e93c64b6..5718b393 100644
--- a/openpower/isa/fixedstoreshift.mdwn
+++ b/openpower/isa/fixedstoreshift.mdwn
@@ -51,7 +51,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA).
+    register RB shifted by (SH+1), and (RA).
     RS[56:63] are stored into the byte in storage addressed
     by EA.
 
@@ -78,7 +78,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     RS[48:63] are stored into the halfword in
     storage addressed by EA.
 
@@ -101,7 +101,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA).
+    register RB shifted by (SH+1), and (RA).
     RS[48:63] are stored into the halfword in storage
     addressed by EA.
 
@@ -128,7 +128,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     RS[32:63] are stored into the word in storage
     addressed by EA.
 
@@ -151,7 +151,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA).
+    register RB shifted by (SH+1), and (RA).
     RS[32:63] are stored into the word in storage addressed
     by EA.
 
@@ -182,7 +182,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     (RS) is stored into the doubleword in
     storage addressed by EA.
 
@@ -205,7 +205,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register (RB) shifted by (SH+1) and (RA).
+    register (RB) shifted by (SH+1), and (RA).
     (RS) is stored into the doubleword in storage
     addressed by EA.
 
@@ -235,7 +235,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     (RS)56:63 are stored into bits 0:7 of the
     halfword in storage addressed by EA. (RS) 48:55 are
     stored into bits 8:15 of the halfword in storage
@@ -261,7 +261,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     (RS)[56:63] are stored into bits 0:7 of the
     word in storage addressed by EA. (RS) [48:55] are stored
     into bits 8:15 of the word in storage addressed by EA.
@@ -293,7 +293,7 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1) and (RA|0).
+    register RB shifted by (SH+1), and (RA|0).
     (RS)[56:63] are stored into bits 0:7 of the
     doubleword in storage addressed by EA. (RS) [48:55] are
     stored into bits 8:15 of the doubleword in storage
-- 
2.30.2