From 0309c877f32d415122cfb59960ec41dba54ba3e3 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <nate@binkert.org>
Date: Fri, 26 Sep 2008 08:18:53 -0700
Subject: [PATCH] style: These files didn't even come close to following the M5
 style guide.

---
 src/arch/mips/dsp.cc | 989 +++++++++++++++++++++----------------------
 src/arch/mips/dsp.hh | 285 +++++++------
 2 files changed, 635 insertions(+), 639 deletions(-)

diff --git a/src/arch/mips/dsp.cc b/src/arch/mips/dsp.cc
index 8e2db3f0b..183016ee7 100755
--- a/src/arch/mips/dsp.cc
+++ b/src/arch/mips/dsp.cc
@@ -40,92 +40,84 @@ using namespace MipsISA;
 using namespace std;
 
 int32_t
-MipsISA::bitrev( int32_t value )
+MipsISA::bitrev(int32_t value)
 {
     int32_t result = 0;
-    int i, shift;
+    int shift;
 
-    for( i=0; i<16; i++ )
-    {
-        shift = 2*i - 15;
+    for (int i = 0; i < 16; i++) {
+        shift = 2 * i - 15;
 
-        if( shift < 0 )
-            result |= (value & 1L<<i) << -shift;
+        if (shift < 0)
+            result |= (value & 1 << i) << -shift;
         else
-            result |= (value & 1L<<i) >> shift;
+            result |= (value & 1 << i) >> shift;
     }
 
     return result;
 }
 
 uint64_t
-MipsISA::dspSaturate( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow )
+MipsISA::dspSaturate(uint64_t value, int32_t fmt, int32_t sign,
+    uint32_t *overflow)
 {
-    int64_t svalue;
+    int64_t svalue = (int64_t)value;
 
-    svalue = (int64_t)value;
-
-    switch( sign )
-    {
+    switch(sign) {
       case SIGNED:
-        if( svalue > (int64_t)FIXED_SMAX[fmt] )
-        {
+        if (svalue > (int64_t)FIXED_SMAX[fmt]) {
             *overflow = 1;
             svalue = (int64_t)FIXED_SMAX[fmt];
-        }
-        else if( svalue < (int64_t)FIXED_SMIN[fmt] )
-        {
+        } else if (svalue < (int64_t)FIXED_SMIN[fmt]) {
             *overflow = 1;
             svalue = (int64_t)FIXED_SMIN[fmt];
         }
         break;
       case UNSIGNED:
-        if( svalue > (int64_t)FIXED_UMAX[fmt] )
-        {
+        if (svalue > (int64_t)FIXED_UMAX[fmt]) {
             *overflow = 1;
             svalue = FIXED_UMAX[fmt];
-        }
-        else if( svalue < (int64_t)FIXED_UMIN[fmt] )
-        {
+        } else if (svalue < (int64_t)FIXED_UMIN[fmt]) {
             *overflow = 1;
             svalue = FIXED_UMIN[fmt];
         }
         break;
     }
 
-    return( (uint64_t)svalue );
+    return (uint64_t)svalue;
 }
 
 uint64_t
-MipsISA::checkOverflow( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow )
+MipsISA::checkOverflow(uint64_t value, int32_t fmt, int32_t sign,
+    uint32_t *overflow)
 {
-    int64_t svalue;
-
-    svalue = (int64_t)value;
+    int64_t svalue = (int64_t)value;
 
-    switch( sign )
+    switch(sign)
     {
       case SIGNED:
-        if( svalue > (int64_t)FIXED_SMAX[fmt] || svalue < (int64_t)FIXED_SMIN[fmt] )
+        if (svalue > (int64_t)FIXED_SMAX[fmt] ||
+            svalue < (int64_t)FIXED_SMIN[fmt])
             *overflow = 1;
         break;
       case UNSIGNED:
-        if( svalue > (int64_t)FIXED_UMAX[fmt] || svalue < (int64_t)FIXED_UMIN[fmt] )
+        if (svalue > (int64_t)FIXED_UMAX[fmt] ||
+            svalue < (int64_t)FIXED_UMIN[fmt])
             *overflow = 1;
         break;
     }
 
-    return( (uint64_t)svalue );
+    return (uint64_t)svalue;
 }
 
 uint64_t
-MipsISA::signExtend( uint64_t value, int32_t fmt )
+MipsISA::signExtend(uint64_t value, int32_t fmt)
 {
     int32_t signpos = SIMD_NBITS[fmt];
-    uint64_t sign = uint64_t(1)<<(signpos-1);
+    uint64_t sign = uint64_t(1) << (signpos - 1);
     uint64_t ones = ~(0ULL);
 
-    if( value & sign )
+    if (value & sign)
         value |= (ones << signpos); // extend with ones
     else
         value &= (ones >> (64 - signpos)); // extend with zeros
@@ -134,231 +126,230 @@ MipsISA::signExtend( uint64_t value, int32_t fmt )
 }
 
 uint64_t
-MipsISA::addHalfLsb( uint64_t value, int32_t lsbpos )
+MipsISA::addHalfLsb(uint64_t value, int32_t lsbpos)
 {
-    return( value += ULL(1) << (lsbpos-1) );
+    return value += ULL(1) << (lsbpos - 1);
 }
 
 int32_t
-MipsISA::dspAbs( int32_t a, int32_t fmt, uint32_t *dspctl )
+MipsISA::dspAbs(int32_t a, int32_t fmt, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     int64_t svalue;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
+    for (int i = 0; i < nvals; i++) {
         svalue = (int64_t)a_values[i];
 
-        if( a_values[i] == FIXED_SMIN[fmt] )
-        {
+        if (a_values[i] == FIXED_SMIN[fmt]) {
             a_values[i] = FIXED_SMAX[fmt];
             ouflag = 1;
-        }
-        else if( svalue < 0 )
-        {
-            a_values[i] = uint64_t( 0 - svalue );
+        } else if (svalue < 0) {
+            a_values[i] = uint64_t(0 - svalue);
         }
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 4) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspAdd( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
+MipsISA::dspAdd(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+    int32_t sign, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
+    for (int i = 0; i < nvals; i++)
     {
-        if( saturate )
-            a_values[i] = dspSaturate( a_values[i] + b_values[i], fmt, sign, &ouflag );
+        if (saturate)
+            a_values[i] = dspSaturate(a_values[i] + b_values[i], fmt, sign,
+                                      &ouflag);
         else
-            a_values[i] = checkOverflow( a_values[i] + b_values[i], fmt, sign, &ouflag );
+            a_values[i] = checkOverflow(a_values[i] + b_values[i], fmt, sign,
+                                        &ouflag);
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 4) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspAddh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign )
+MipsISA::dspAddh(int32_t a, int32_t b, int32_t fmt, int32_t round,
+    int32_t sign)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
-    {
-        if( round )
-            a_values[i] = addHalfLsb( a_values[i] + b_values[i], 1 ) >> 1;
+    for (int i = 0; i < nvals; i++) {
+        if (round)
+            a_values[i] = addHalfLsb(a_values[i] + b_values[i], 1) >> 1;
         else
-            a_values[i] = ( a_values[i] + b_values[i] ) >> 1;
+            a_values[i] = (a_values[i] + b_values[i]) >> 1;
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspSub( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
+MipsISA::dspSub(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+    int32_t sign, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
-    {
-        if( saturate )
-            a_values[i] = dspSaturate( a_values[i] - b_values[i], fmt, sign, &ouflag );
+    for (int i = 0; i < nvals; i++) {
+        if (saturate)
+            a_values[i] = dspSaturate(a_values[i] - b_values[i], fmt, sign,
+                                      &ouflag);
         else
-            a_values[i] = checkOverflow( a_values[i] - b_values[i], fmt, sign, &ouflag );
+            a_values[i] = checkOverflow(a_values[i] - b_values[i], fmt, sign,
+                                        &ouflag);
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<4)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 4) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspSubh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign )
+MipsISA::dspSubh(int32_t a, int32_t b, int32_t fmt, int32_t round,
+    int32_t sign)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
+    for (int i = 0; i < nvals; i++)
     {
-        if( round )
-            a_values[i] = addHalfLsb( a_values[i] - b_values[i], 1 ) >> 1;
+        if (round)
+            a_values[i] = addHalfLsb(a_values[i] - b_values[i], 1) >> 1;
         else
-            a_values[i] = ( a_values[i] - b_values[i] ) >> 1;
+            a_values[i] = (a_values[i] - b_values[i]) >> 1;
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspShll( int32_t a, uint32_t sa, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl )
+MipsISA::dspShll(int32_t a, uint32_t sa, int32_t fmt, int32_t saturate,
+    int32_t sign, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
 
-    sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
-    simdUnpack( a, a_values, fmt, sign );
+    sa = bits(sa, SIMD_LOG2N[fmt] - 1, 0);
+    simdUnpack(a, a_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
+    for (int i = 0; i < nvals; i++)
     {
-        if( saturate )
-            a_values[i] = dspSaturate( a_values[i] << sa, fmt, sign, &ouflag );
+        if (saturate)
+            a_values[i] = dspSaturate(a_values[i] << sa, fmt, sign, &ouflag);
         else
-            a_values[i] = checkOverflow( a_values[i] << sa, fmt, sign, &ouflag );
+            a_values[i] = checkOverflow(a_values[i] << sa, fmt, sign, &ouflag);
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<6)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 6) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspShrl( int32_t a, uint32_t sa, int32_t fmt, int32_t sign )
+MipsISA::dspShrl(int32_t a, uint32_t sa, int32_t fmt, int32_t sign)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
 
-    sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
+    sa = bits(sa, SIMD_LOG2N[fmt] - 1, 0);
 
-    simdUnpack( a, a_values, fmt, UNSIGNED );
+    simdUnpack(a, a_values, fmt, UNSIGNED);
 
-    for( i=0; i<nvals; i++ )
+    for (int i = 0; i < nvals; i++)
         a_values[i] = a_values[i] >> sa;
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspShra( int32_t a, uint32_t sa, int32_t fmt, int32_t round, int32_t sign, uint32_t *dspctl )
+MipsISA::dspShra(int32_t a, uint32_t sa, int32_t fmt, int32_t round,
+    int32_t sign, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
 
-    sa = bits( sa, SIMD_LOG2N[fmt]-1, 0 );
+    sa = bits(sa, SIMD_LOG2N[fmt] - 1, 0);
 
-    simdUnpack( a, a_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        if( round )
-            a_values[i] = addHalfLsb( a_values[i], sa ) >> sa;
+    for (int i = 0; i < nvals; i++) {
+        if (round)
+            a_values[i] = addHalfLsb(a_values[i], sa) >> sa;
         else
             a_values[i] = a_values[i] >> sa;
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspMulq( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t round, uint32_t *dspctl )
+MipsISA::dspMulq(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+    int32_t round, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int sa = SIMD_NBITS[fmt];
     int32_t result;
@@ -367,102 +358,104 @@ MipsISA::dspMulq( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t r
     uint64_t b_values[SIMD_MAX_VALS];
     int64_t temp;
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        if( round )
-            temp = (int64_t)addHalfLsb( a_values[i] * b_values[i] << 1, sa ) >> sa;
+    for (int i = 0; i < nvals; i++) {
+        if (round)
+            temp =
+                (int64_t)addHalfLsb(a_values[i] * b_values[i] << 1, sa) >> sa;
         else
             temp = (int64_t)(a_values[i] * b_values[i]) >> (sa - 1);
 
-        if( a_values[i] == FIXED_SMIN[fmt] &&
-            b_values[i] == FIXED_SMIN[fmt] )
-        {
+        if (a_values[i] == FIXED_SMIN[fmt] && b_values[i] == FIXED_SMIN[fmt]) {
             ouflag = 1;
 
-            if( saturate )
+            if (saturate)
                 temp = FIXED_SMAX[fmt];
         }
 
         a_values[i] = temp;
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 5) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspMul( int32_t a, int32_t b, int32_t fmt, int32_t saturate, uint32_t *dspctl )
+MipsISA::dspMul(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+    uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
+    for (int i = 0; i < nvals; i++)
     {
-        if( saturate )
-            a_values[i] = dspSaturate( a_values[i] * b_values[i], fmt, SIGNED, &ouflag );
+        if (saturate)
+            a_values[i] = dspSaturate(a_values[i] * b_values[i], fmt, SIGNED,
+                                      &ouflag);
         else
-            a_values[i] = checkOverflow( a_values[i] * b_values[i], fmt, SIGNED, &ouflag );
+            a_values[i] = checkOverflow(a_values[i] * b_values[i], fmt, SIGNED,
+                                        &ouflag);
     }
 
-    simdPack( a_values, &result, fmt );
+    simdPack(a_values, &result, fmt);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 5) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspMuleu( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl )
+MipsISA::dspMuleu(int32_t a, int32_t b, int32_t mode, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[SIMD_FMT_PH];
     int32_t result;
     uint32_t ouflag = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, SIMD_FMT_QB, UNSIGNED );
-    simdUnpack( b, b_values, SIMD_FMT_PH, UNSIGNED );
+    simdUnpack(a, a_values, SIMD_FMT_QB, UNSIGNED);
+    simdUnpack(b, b_values, SIMD_FMT_PH, UNSIGNED);
 
-    switch( mode )
-    {
+    switch(mode) {
       case MODE_L:
-        for( i=0; i<nvals; i++ )
-            b_values[i] = dspSaturate( a_values[i+2] * b_values[i], SIMD_FMT_PH, UNSIGNED, &ouflag );
+        for (int i = 0; i < nvals; i++)
+            b_values[i] = dspSaturate(a_values[i + 2] * b_values[i],
+                                      SIMD_FMT_PH, UNSIGNED, &ouflag);
         break;
       case MODE_R:
-        for( i=0; i<nvals; i++ )
-            b_values[i] = dspSaturate( a_values[i] * b_values[i], SIMD_FMT_PH, UNSIGNED, &ouflag );
+        for (int i = 0; i < nvals; i++)
+            b_values[i] = dspSaturate(a_values[i] * b_values[i], SIMD_FMT_PH,
+                                      UNSIGNED, &ouflag);
         break;
     }
 
-    simdPack( b_values, &result, SIMD_FMT_PH );
+    simdPack(b_values, &result, SIMD_FMT_PH);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 5) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspMuleq( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl )
+MipsISA::dspMuleq(int32_t a, int32_t b, int32_t mode, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[SIMD_FMT_W];
     int32_t result;
     uint32_t ouflag = 0;
@@ -470,36 +463,36 @@ MipsISA::dspMuleq( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl )
     uint64_t b_values[SIMD_MAX_VALS];
     uint64_t c_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, SIMD_FMT_PH, SIGNED );
-    simdUnpack( b, b_values, SIMD_FMT_PH, SIGNED );
+    simdUnpack(a, a_values, SIMD_FMT_PH, SIGNED);
+    simdUnpack(b, b_values, SIMD_FMT_PH, SIGNED);
 
-    switch( mode )
-    {
+    switch(mode) {
       case MODE_L:
-        for( i=0; i<nvals; i++ )
-            c_values[i] = dspSaturate( a_values[i+1] * b_values[i+1] << 1,
-                                       SIMD_FMT_W, SIGNED, &ouflag );
+        for (int i = 0; i < nvals; i++)
+            c_values[i] = dspSaturate(a_values[i + 1] * b_values[i + 1] << 1,
+                                       SIMD_FMT_W, SIGNED, &ouflag);
         break;
       case MODE_R:
-        for( i=0; i<nvals; i++ )
-            c_values[i] = dspSaturate( a_values[i] * b_values[i] << 1,
-                                       SIMD_FMT_W, SIGNED, &ouflag );
+        for (int i = 0; i < nvals; i++)
+            c_values[i] = dspSaturate(a_values[i] * b_values[i] << 1,
+                                       SIMD_FMT_W, SIGNED, &ouflag);
         break;
     }
 
-    simdPack( c_values, &result, SIMD_FMT_W );
+    simdPack(c_values, &result, SIMD_FMT_W);
 
-    if( ouflag )
-        writeDSPControl( dspctl, (ouflag<<5)<<DSP_CTL_POS[DSP_OUFLAG], 1<<DSP_OUFLAG);
+    if (ouflag)
+        writeDSPControl(dspctl, (ouflag << 5) << DSP_CTL_POS[DSP_OUFLAG],
+                        1 << DSP_OUFLAG);
 
-    return( result );
+    return result;
 }
 
 int64_t
-MipsISA::dspDpaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
-                  int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl )
+MipsISA::dspDpaq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+    int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
+    uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[infmt];
     int64_t result = 0;
     int64_t temp = 0;
@@ -507,74 +500,66 @@ MipsISA::dspDpaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, infmt, SIGNED );
-    simdUnpack( b, b_values, infmt, SIGNED );
+    simdUnpack(a, a_values, infmt, SIGNED);
+    simdUnpack(b, b_values, infmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        switch( mode )
-        {
+    for (int i = 0; i < nvals; i++) {
+        switch(mode) {
           case MODE_X:
-            if( a_values[nvals-1-i] == FIXED_SMIN[infmt] &&
-                b_values[i] == FIXED_SMIN[infmt] )
-            {
+            if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
+                b_values[i] == FIXED_SMIN[infmt]) {
                 result += FIXED_SMAX[outfmt];
                 ouflag = 1;
             }
             else
-                result += a_values[nvals-1-i] * b_values[i] << 1;
+                result += a_values[nvals - 1 - i] * b_values[i] << 1;
             break;
           default:
-            if( a_values[i] == FIXED_SMIN[infmt] &&
-                b_values[i] == FIXED_SMIN[infmt] )
-            {
+            if (a_values[i] == FIXED_SMIN[infmt] &&
+                b_values[i] == FIXED_SMIN[infmt]) {
                 result += FIXED_SMAX[outfmt];
                 ouflag = 1;
-            }
-            else
+            } else {
                 result += a_values[i] * b_values[i] << 1;
+            }
             break;
         }
     }
 
-    if( postsat )
-    {
-        if( outfmt == SIMD_FMT_L )
-        {
-            int signa = bits( dspac, 63, 63 );
-            int signb = bits( result, 63, 63 );
+    if (postsat) {
+        if (outfmt == SIMD_FMT_L) {
+            int signa = bits(dspac, 63, 63);
+            int signb = bits(result, 63, 63);
 
             temp = dspac + result;
 
-            if( ( signa == signb ) &&
-                ( bits( temp, 63, 63 ) != signa ) )
-            {
+            if (signa == signb && bits(temp, 63, 63) != signa) {
                 ouflag = 1;
-                if( signa )
+                if (signa)
                     dspac = FIXED_SMIN[outfmt];
                 else
                     dspac = FIXED_SMAX[outfmt];
-            }
-            else
+            } else {
                 dspac = temp;
+            }
+        } else {
+            dspac = dspSaturate(dspac + result, outfmt, SIGNED, &ouflag);
         }
-        else
-            dspac = dspSaturate( dspac + result, outfmt, SIGNED, &ouflag );
-    }
-    else
+    } else {
         dspac += result;
+    }
 
-    if( ouflag )
-        *dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
+    if (ouflag)
+        *dspctl = insertBits(*dspctl, 16 + ac, 16 + ac, 1);
 
-    return( dspac );
+    return dspac;
 }
 
 int64_t
-MipsISA::dspDpsq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
-                  int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl )
+MipsISA::dspDpsq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+    int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
+    uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[infmt];
     int64_t result = 0;
     int64_t temp = 0;
@@ -582,93 +567,82 @@ MipsISA::dspDpsq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, infmt, SIGNED );
-    simdUnpack( b, b_values, infmt, SIGNED );
+    simdUnpack(a, a_values, infmt, SIGNED);
+    simdUnpack(b, b_values, infmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        switch( mode )
-        {
+    for (int i = 0; i < nvals; i++) {
+        switch(mode) {
           case MODE_X:
-            if( a_values[nvals-1-i] == FIXED_SMIN[infmt] &&
-                b_values[i] == FIXED_SMIN[infmt] )
-            {
+            if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
+                b_values[i] == FIXED_SMIN[infmt]) {
                 result += FIXED_SMAX[outfmt];
                 ouflag = 1;
+            } else {
+                result += a_values[nvals - 1 - i] * b_values[i] << 1;
             }
-            else
-                result += a_values[nvals-1-i] * b_values[i] << 1;
             break;
           default:
-            if( a_values[i] == FIXED_SMIN[infmt] &&
-                b_values[i] == FIXED_SMIN[infmt] )
-            {
+            if (a_values[i] == FIXED_SMIN[infmt] &&
+                b_values[i] == FIXED_SMIN[infmt]) {
                 result += FIXED_SMAX[outfmt];
                 ouflag = 1;
-            }
-            else
+            } else {
                 result += a_values[i] * b_values[i] << 1;
+            }
             break;
         }
     }
 
-    if( postsat )
-    {
-        if( outfmt == SIMD_FMT_L )
-        {
-            int signa = bits( dspac, 63, 63 );
-            int signb = bits( -result, 63, 63 );
+    if (postsat) {
+        if (outfmt == SIMD_FMT_L) {
+            int signa = bits(dspac, 63, 63);
+            int signb = bits(-result, 63, 63);
 
             temp = dspac - result;
 
-            if( ( signa == signb ) &&
-                ( bits( temp, 63, 63 ) != signa ) )
-            {
+            if (signa == signb && bits(temp, 63, 63) != signa) {
                 ouflag = 1;
-                if( signa )
+                if (signa)
                     dspac = FIXED_SMIN[outfmt];
                 else
                     dspac = FIXED_SMAX[outfmt];
-            }
-            else
+            } else {
                 dspac = temp;
+            }
+        } else {
+            dspac = dspSaturate(dspac - result, outfmt, SIGNED, &ouflag);
         }
-        else
-            dspac = dspSaturate( dspac - result, outfmt, SIGNED, &ouflag );
-    }
-    else
+    } else {
         dspac -= result;
+    }
 
-    if( ouflag )
-        *dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
+    if (ouflag)
+        *dspctl = insertBits(*dspctl, 16 + ac, 16 + ac, 1);
 
-    return( dspac );
+    return dspac;
 }
 
 int64_t
-MipsISA::dspDpa( int64_t dspac, int32_t a, int32_t b, int32_t ac,
-                 int32_t fmt, int32_t sign, int32_t mode )
+MipsISA::dspDpa(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+                int32_t fmt, int32_t sign, int32_t mode)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<2; i++ )
-    {
-        switch( mode )
-        {
+    for (int i = 0; i < 2; i++) {
+        switch(mode) {
           case MODE_L:
-            dspac += a_values[nvals-1-i] * b_values[nvals-1-i];
+            dspac += a_values[nvals - 1 - i] * b_values[nvals - 1 - i];
             break;
           case MODE_R:
-            dspac += a_values[nvals-3-i] * b_values[nvals-3-i];
+            dspac += a_values[nvals - 3 - i] * b_values[nvals - 3 - i];
             break;
           case MODE_X:
-            dspac += a_values[nvals-1-i] * b_values[i];
+            dspac += a_values[nvals - 1 - i] * b_values[i];
             break;
         }
     }
@@ -677,29 +651,26 @@ MipsISA::dspDpa( int64_t dspac, int32_t a, int32_t b, int32_t ac,
 }
 
 int64_t
-MipsISA::dspDps( int64_t dspac, int32_t a, int32_t b, int32_t ac,
-                 int32_t fmt, int32_t sign, int32_t mode )
+MipsISA::dspDps(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+                int32_t fmt, int32_t sign, int32_t mode)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<2; i++ )
-    {
-        switch( mode )
-        {
+    for (int i = 0; i < 2; i++) {
+        switch(mode) {
           case MODE_L:
-            dspac -= a_values[nvals-1-i] * b_values[nvals-1-i];
+            dspac -= a_values[nvals - 1 - i] * b_values[nvals - 1 - i];
             break;
           case MODE_R:
-            dspac -= a_values[nvals-3-i] * b_values[nvals-3-i];
+            dspac -= a_values[nvals - 3 - i] * b_values[nvals - 3 - i];
             break;
           case MODE_X:
-            dspac -= a_values[nvals-1-i] * b_values[i];
+            dspac -= a_values[nvals - 1 - i] * b_values[i];
             break;
         }
     }
@@ -708,36 +679,33 @@ MipsISA::dspDps( int64_t dspac, int32_t a, int32_t b, int32_t ac,
 }
 
 int64_t
-MipsISA::dspMaq( int64_t dspac, int32_t a, int32_t b, int32_t ac,
-                 int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl )
+MipsISA::dspMaq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+                 int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl)
 {
-    int i = 0;
-    int nvals = SIMD_NVALS[fmt-1];
+    int nvals = SIMD_NVALS[fmt - 1];
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     int64_t temp = 0;
     uint32_t ouflag = 0;
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        switch( mode )
-        {
+    for (int i = 0; i < nvals; i++) {
+        switch(mode) {
           case MODE_L:
-            temp = a_values[i+1] * b_values[i+1] << 1;
-            if( a_values[i+1] == FIXED_SMIN[fmt] && b_values[i+1] == FIXED_SMIN[fmt] )
-            {
-                temp = (int64_t)FIXED_SMAX[fmt-1];
+            temp = a_values[i + 1] * b_values[i + 1] << 1;
+            if (a_values[i + 1] == FIXED_SMIN[fmt] &&
+                b_values[i + 1] == FIXED_SMIN[fmt]) {
+                temp = (int64_t)FIXED_SMAX[fmt - 1];
                 ouflag = 1;
             }
             break;
           case MODE_R:
             temp = a_values[i] * b_values[i] << 1;
-            if( a_values[i] == FIXED_SMIN[fmt] && b_values[i] == FIXED_SMIN[fmt] )
-            {
-                temp = (int64_t)FIXED_SMAX[fmt-1];
+            if (a_values[i] == FIXED_SMIN[fmt] &&
+                b_values[i] == FIXED_SMIN[fmt]) {
+                temp = (int64_t)FIXED_SMAX[fmt - 1];
                 ouflag = 1;
             }
             break;
@@ -745,23 +713,23 @@ MipsISA::dspMaq( int64_t dspac, int32_t a, int32_t b, int32_t ac,
 
         temp += dspac;
 
-        if( saturate )
-            temp = dspSaturate( temp, fmt-1, SIGNED, &ouflag );
-        if( ouflag )
-            *dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
+        if (saturate)
+            temp = dspSaturate(temp, fmt - 1, SIGNED, &ouflag);
+        if (ouflag)
+            *dspctl = insertBits(*dspctl, 16 + ac, 16 + ac, 1);
     }
 
     return temp;
 }
 
 int64_t
-MipsISA::dspMulsa( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt )
+MipsISA::dspMulsa(int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt)
 {
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
     dspac += a_values[1] * b_values[1] - a_values[0] * b_values[0];
 
@@ -769,132 +737,140 @@ MipsISA::dspMulsa( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt
 }
 
 int64_t
-MipsISA::dspMulsaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, uint32_t *dspctl )
+MipsISA::dspMulsaq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+    int32_t fmt, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     int64_t temp[2];
     uint32_t ouflag = 0;
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    for( i=nvals-1; i>-1; i-- )
-    {
+    for (int i = nvals - 1; i > -1; i--) {
         temp[i] = a_values[i] * b_values[i] << 1;
-        if( a_values[i] == FIXED_SMIN[fmt] &&
-            b_values[i] == FIXED_SMIN[fmt] )
-        {
-            temp[i] = FIXED_SMAX[fmt-1];
+        if (a_values[i] == FIXED_SMIN[fmt] && b_values[i] == FIXED_SMIN[fmt]) {
+            temp[i] = FIXED_SMAX[fmt - 1];
             ouflag = 1;
         }
     }
 
     dspac += temp[1] - temp[0];
 
-    if( ouflag )
-        *dspctl = insertBits( *dspctl, 16+ac, 16+ac, 1 );
+    if (ouflag)
+        *dspctl = insertBits(*dspctl, 16 + ac, 16 + ac, 1);
 
     return dspac;
 }
 
 void
-MipsISA::dspCmp( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl )
+MipsISA::dspCmp(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op,
+    uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int ccond = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
-    {
+    for (int i = 0; i < nvals; i++) {
         int cc = 0;
 
-        switch( op )
-        {
-          case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
-          case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
-          case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
+        switch(op) {
+          case CMP_EQ:
+            cc = (a_values[i] == b_values[i]);
+            break;
+          case CMP_LT:
+            cc = (a_values[i] < b_values[i]);
+            break;
+          case CMP_LE:
+            cc = (a_values[i] <= b_values[i]);
+            break;
         }
 
-        ccond |= cc << ( DSP_CTL_POS[DSP_CCOND] + i );
+        ccond |= cc << (DSP_CTL_POS[DSP_CCOND] + i);
     }
 
-    writeDSPControl( dspctl, ccond, 1<<DSP_CCOND );
+    writeDSPControl(dspctl, ccond, 1 << DSP_CCOND);
 }
 
 int32_t
-MipsISA::dspCmpg( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op )
+MipsISA::dspCmpg(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
-    {
+    for (int i = 0; i < nvals; i++) {
         int cc = 0;
 
-        switch( op )
-        {
-          case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
-          case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
-          case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
+        switch(op) {
+          case CMP_EQ:
+            cc = (a_values[i] == b_values[i]);
+            break;
+          case CMP_LT:
+            cc = (a_values[i] < b_values[i]);
+            break;
+          case CMP_LE:
+            cc = (a_values[i] <= b_values[i]);
+            break;
         }
 
         result |= cc << i;
     }
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspCmpgd( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl )
+MipsISA::dspCmpgd(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op,
+    uint32_t *dspctl)
 {
-    int i = 0;;
     int nvals = SIMD_NVALS[fmt];
     int32_t result = 0;
     int ccond = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, sign );
-    simdUnpack( b, b_values, fmt, sign );
+    simdUnpack(a, a_values, fmt, sign);
+    simdUnpack(b, b_values, fmt, sign);
 
-    for( i=0; i<nvals; i++ )
-    {
-        int cc = 0;;
+    for (int i = 0; i < nvals; i++) {
+        int cc = 0;
 
-        switch( op )
-        {
-          case CMP_EQ: cc = ( a_values[i] == b_values[i] ); break;
-          case CMP_LT: cc = ( a_values[i] < b_values[i] ); break;
-          case CMP_LE: cc = ( a_values[i] <= b_values[i] ); break;
+        switch(op) {
+          case CMP_EQ:
+            cc = (a_values[i] == b_values[i]);
+            break;
+          case CMP_LT:
+            cc = (a_values[i] < b_values[i]);
+            break;
+          case CMP_LE:
+            cc = (a_values[i] <= b_values[i]);
+            break;
         }
 
         result |= cc << i;
-        ccond |= cc << ( DSP_CTL_POS[DSP_CCOND] + i );
+        ccond |= cc << (DSP_CTL_POS[DSP_CCOND] + i);
     }
 
-    writeDSPControl( dspctl, ccond, 1<<DSP_CCOND );
+    writeDSPControl(dspctl, ccond, 1 << DSP_CCOND);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspPrece( int32_t a, int32_t infmt, int32_t insign, int32_t outfmt, int32_t outsign, int32_t mode )
+MipsISA::dspPrece(int32_t a, int32_t infmt, int32_t insign, int32_t outfmt,
+    int32_t outsign, int32_t mode)
 {
-    int i = 0;
     int sa = 0;
     int ninvals = SIMD_NVALS[infmt];
     int noutvals = SIMD_NVALS[outfmt];
@@ -902,62 +878,68 @@ MipsISA::dspPrece( int32_t a, int32_t infmt, int32_t insign, int32_t outfmt, int
     uint64_t in_values[SIMD_MAX_VALS];
     uint64_t out_values[SIMD_MAX_VALS];
 
-    if( insign == SIGNED && outsign == SIGNED )
+    if (insign == SIGNED && outsign == SIGNED)
       sa = SIMD_NBITS[infmt];
-    else if( insign == UNSIGNED && outsign == SIGNED )
+    else if (insign == UNSIGNED && outsign == SIGNED)
       sa = SIMD_NBITS[infmt] - 1;
-    else if( insign == UNSIGNED && outsign == UNSIGNED )
+    else if (insign == UNSIGNED && outsign == UNSIGNED)
       sa = 0;
 
-    simdUnpack( a, in_values, infmt, insign );
+    simdUnpack(a, in_values, infmt, insign);
 
-    for( i=0; i<noutvals; i++ )
-    {
-        switch( mode )
-        {
-          case MODE_L: out_values[i] = in_values[i+(ninvals>>1)] << sa; break;
-          case MODE_R: out_values[i] = in_values[i] << sa; break;
-          case MODE_LA: out_values[i] = in_values[(i<<1)+1] << sa; break;
-          case MODE_RA: out_values[i] = in_values[i<<1] << sa; break;
+    for (int i = 0; i<noutvals; i++) {
+        switch(mode) {
+          case MODE_L:
+            out_values[i] = in_values[i + (ninvals >> 1)] << sa;
+            break;
+          case MODE_R:
+            out_values[i] = in_values[i] << sa;
+            break;
+          case MODE_LA:
+            out_values[i] = in_values[(i << 1) + 1] << sa;
+            break;
+          case MODE_RA:
+            out_values[i] = in_values[i << 1] << sa;
+            break;
         }
     }
 
-    simdPack( out_values, &result, outfmt );
+    simdPack(out_values, &result, outfmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspPrecrqu( int32_t a, int32_t b, uint32_t *dspctl )
+MipsISA::dspPrecrqu(int32_t a, int32_t b, uint32_t *dspctl)
 {
-    int i = 0;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     uint64_t r_values[SIMD_MAX_VALS];
     uint32_t ouflag = 0;
     int32_t result = 0;
 
-    simdUnpack( a, a_values, SIMD_FMT_PH, SIGNED );
-    simdUnpack( b, b_values, SIMD_FMT_PH, SIGNED );
+    simdUnpack(a, a_values, SIMD_FMT_PH, SIGNED);
+    simdUnpack(b, b_values, SIMD_FMT_PH, SIGNED);
 
-    for( i=0; i<2; i++ )
-    {
-        r_values[i] = dspSaturate( (int64_t)b_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
-                                   SIMD_FMT_QB, UNSIGNED, &ouflag );
-        r_values[i+2] = dspSaturate( (int64_t)a_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
-                                     SIMD_FMT_QB, UNSIGNED, &ouflag );
+    for (int i = 0; i<2; i++) {
+        r_values[i] =
+            dspSaturate((int64_t)b_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
+                        SIMD_FMT_QB, UNSIGNED, &ouflag);
+        r_values[i + 2] =
+            dspSaturate((int64_t)a_values[i] >> SIMD_NBITS[SIMD_FMT_QB] - 1,
+                        SIMD_FMT_QB, UNSIGNED, &ouflag);
     }
 
-    simdPack( r_values, &result, SIMD_FMT_QB );
+    simdPack(r_values, &result, SIMD_FMT_QB);
 
-    if( ouflag )
-        *dspctl = insertBits( *dspctl, 22, 22, 1 );
+    if (ouflag)
+        *dspctl = insertBits(*dspctl, 22, 22, 1);
 
     return result;
 }
 
 int32_t
-MipsISA::dspPrecrq( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl )
+MipsISA::dspPrecrq(int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl)
 {
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
@@ -965,245 +947,226 @@ MipsISA::dspPrecrq( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl )
     uint32_t ouflag = 0;
     int32_t result;
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    r_values[1] = dspSaturate( (int64_t)addHalfLsb( a_values[0], 16 ) >> 16,
-                                   fmt+1, SIGNED, &ouflag );
-    r_values[0] = dspSaturate( (int64_t)addHalfLsb( b_values[0], 16 ) >> 16,
-                                   fmt+1, SIGNED, &ouflag );
+    r_values[1] = dspSaturate((int64_t)addHalfLsb(a_values[0], 16) >> 16,
+                              fmt + 1, SIGNED, &ouflag);
+    r_values[0] = dspSaturate((int64_t)addHalfLsb(b_values[0], 16) >> 16,
+                              fmt + 1, SIGNED, &ouflag);
 
-    simdPack( r_values, &result, fmt+1 );
+    simdPack(r_values, &result, fmt + 1);
 
-    if( ouflag )
-        *dspctl = insertBits( *dspctl, 22, 22, 1 );
+    if (ouflag)
+        *dspctl = insertBits(*dspctl, 22, 22, 1);
 
     return result;
 }
 
 int32_t
-MipsISA::dspPrecrSra( int32_t a, int32_t b, int32_t sa, int32_t fmt, int32_t round )
+MipsISA::dspPrecrSra(int32_t a, int32_t b, int32_t sa, int32_t fmt,
+    int32_t round)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     uint64_t c_values[SIMD_MAX_VALS];
     int32_t result = 0;
 
-    simdUnpack( a, a_values, fmt, SIGNED );
-    simdUnpack( b, b_values, fmt, SIGNED );
+    simdUnpack(a, a_values, fmt, SIGNED);
+    simdUnpack(b, b_values, fmt, SIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
-        if( round )
-        {
-            c_values[i] = addHalfLsb( b_values[i], sa ) >> sa;
-            c_values[i+1] = addHalfLsb( a_values[i], sa ) >> sa;
-        }
-        else
-        {
+    for (int i = 0; i < nvals; i++) {
+        if (round) {
+            c_values[i] = addHalfLsb(b_values[i], sa) >> sa;
+            c_values[i + 1] = addHalfLsb(a_values[i], sa) >> sa;
+        } else {
             c_values[i] = b_values[i] >> sa;
-            c_values[i+1] = a_values[i] >> sa;
+            c_values[i + 1] = a_values[i] >> sa;
         }
     }
 
-    simdPack( c_values, &result, fmt+1 );
+    simdPack(c_values, &result, fmt + 1);
 
     return result;
 }
 
 int32_t
-MipsISA::dspPick( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl )
+MipsISA::dspPick(int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     uint64_t c_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, UNSIGNED );
-    simdUnpack( b, b_values, fmt, UNSIGNED );
+    simdUnpack(a, a_values, fmt, UNSIGNED);
+    simdUnpack(b, b_values, fmt, UNSIGNED);
 
-    for( i=0; i<nvals; i++ )
-    {
+    for (int i = 0; i < nvals; i++) {
         int condbit = DSP_CTL_POS[DSP_CCOND] + i;
-        if( bits( *dspctl, condbit, condbit ) == 1 )
+        if (bits(*dspctl, condbit, condbit) == 1)
             c_values[i] = a_values[i];
         else
             c_values[i] = b_values[i];
     }
 
-    simdPack( c_values, &result, fmt );
+    simdPack(c_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspPack( int32_t a, int32_t b, int32_t fmt )
+MipsISA::dspPack(int32_t a, int32_t b, int32_t fmt)
 {
     int32_t result;
     uint64_t a_values[SIMD_MAX_VALS];
     uint64_t b_values[SIMD_MAX_VALS];
     uint64_t c_values[SIMD_MAX_VALS];
 
-    simdUnpack( a, a_values, fmt, UNSIGNED );
-    simdUnpack( b, b_values, fmt, UNSIGNED );
+    simdUnpack(a, a_values, fmt, UNSIGNED);
+    simdUnpack(b, b_values, fmt, UNSIGNED);
 
     c_values[0] = b_values[1];
     c_values[1] = a_values[0];
 
-    simdPack( c_values, &result, fmt );
+    simdPack(c_values, &result, fmt);
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspExtr( int64_t dspac, int32_t fmt, int32_t sa, int32_t round, int32_t saturate, uint32_t *dspctl )
+MipsISA::dspExtr(int64_t dspac, int32_t fmt, int32_t sa, int32_t round,
+    int32_t saturate, uint32_t *dspctl)
 {
     int32_t result = 0;
     uint32_t ouflag = 0;
     int64_t temp = 0;
 
-    sa = bits( sa, 4, 0 );
+    sa = bits(sa, 4, 0);
 
-    if( sa > 0 )
-    {
-        if( round )
-        {
-            temp = (int64_t)addHalfLsb( dspac, sa );
+    if (sa > 0) {
+        if (round) {
+            temp = (int64_t)addHalfLsb(dspac, sa);
 
-            if( dspac > 0 && temp < 0 )
-            {
+            if (dspac > 0 && temp < 0) {
                 ouflag = 1;
-                if( saturate )
+                if (saturate)
                     temp = FIXED_SMAX[SIMD_FMT_L];
             }
             temp = temp >> sa;
-        }
-        else
+        } else {
             temp = dspac >> sa;
-    }
-    else
+        }
+    } else {
         temp = dspac;
+    }
 
-    dspac = checkOverflow( dspac, fmt, SIGNED, &ouflag );
+    dspac = checkOverflow(dspac, fmt, SIGNED, &ouflag);
 
-    if( ouflag )
-    {
-        *dspctl = insertBits( *dspctl, 23, 23, ouflag );
+    if (ouflag) {
+        *dspctl = insertBits(*dspctl, 23, 23, ouflag);
 
-        if( saturate )
-            result = (int32_t)dspSaturate( temp, fmt, SIGNED, &ouflag );
+        if (saturate)
+            result = (int32_t)dspSaturate(temp, fmt, SIGNED, &ouflag);
         else
             result = (int32_t)temp;
-    }
-    else
+    } else {
         result = (int32_t)temp;
+    }
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspExtp( int64_t dspac, int32_t size, uint32_t *dspctl )
+MipsISA::dspExtp(int64_t dspac, int32_t size, uint32_t *dspctl)
 {
     int32_t pos = 0;
     int32_t result = 0;
 
-    pos = bits( *dspctl, 5, 0 );
-    size = bits( size, 4, 0 );
+    pos = bits(*dspctl, 5, 0);
+    size = bits(size, 4, 0);
 
-    if( pos - (size+1) >= -1 )
-    {
-        result = bits( dspac, pos, pos-size );
-        *dspctl = insertBits( *dspctl, 14, 14, 0 );
-    }
-    else
-    {
+    if (pos - (size + 1) >= -1) {
+        result = bits(dspac, pos, pos - size);
+        *dspctl = insertBits(*dspctl, 14, 14, 0);
+    } else {
         result = 0;
-        *dspctl = insertBits( *dspctl, 14, 14, 1 );
+        *dspctl = insertBits(*dspctl, 14, 14, 1);
     }
 
-    return( result );
+    return result;
 }
 
 int32_t
-MipsISA::dspExtpd( int64_t dspac, int32_t size, uint32_t *dspctl )
+MipsISA::dspExtpd(int64_t dspac, int32_t size, uint32_t *dspctl)
 {
     int32_t pos = 0;
     int32_t result = 0;
 
-    pos = bits( *dspctl, 5, 0 );
-    size = bits( size, 4, 0 );
-
-    if( pos - (size+1) >= -1 )
-    {
-        result = bits( dspac, pos, pos-size );
-        *dspctl = insertBits( *dspctl, 14, 14, 0 );
-        if( pos - (size+1) >= 0 )
-            *dspctl = insertBits( *dspctl, 5, 0, pos - (size+1) );
-        else if( (pos - (size+1)) == -1 )
-            *dspctl = insertBits( *dspctl, 5, 0, 63 );
-    }
-    else
-    {
+    pos = bits(*dspctl, 5, 0);
+    size = bits(size, 4, 0);
+
+    if (pos - (size + 1) >= -1) {
+        result = bits(dspac, pos, pos - size);
+        *dspctl = insertBits(*dspctl, 14, 14, 0);
+        if (pos - (size + 1) >= 0)
+            *dspctl = insertBits(*dspctl, 5, 0, pos - (size + 1));
+        else if ((pos - (size + 1)) == -1)
+            *dspctl = insertBits(*dspctl, 5, 0, 63);
+    } else {
         result = 0;
-        *dspctl = insertBits( *dspctl, 14, 14, 1 );
+        *dspctl = insertBits(*dspctl, 14, 14, 1);
     }
 
-    return( result );
+    return result;
 }
 
 void
-MipsISA::simdPack( uint64_t *values_ptr, int32_t *reg, int32_t fmt )
+MipsISA::simdPack(uint64_t *values_ptr, int32_t *reg, int32_t fmt)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int nbits = SIMD_NBITS[fmt];
 
     *reg = 0;
 
-    for( i=0; i<nvals; i++ )
-        *reg |= (int32_t)bits( values_ptr[i], nbits-1, 0 ) << nbits*i;
+    for (int i = 0; i < nvals; i++)
+        *reg |= (int32_t)bits(values_ptr[i], nbits - 1, 0) << nbits * i;
 }
 
 void
-MipsISA::simdUnpack( int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign )
+MipsISA::simdUnpack(int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign)
 {
-    int i = 0;
     int nvals = SIMD_NVALS[fmt];
     int nbits = SIMD_NBITS[fmt];
 
-    switch( sign )
-    {
-    case SIGNED:
-        for( i=0; i<nvals; i++ )
-        {
-            values_ptr[i] = (uint64_t)bits( reg, nbits*(i+1)-1, nbits*i );
-            values_ptr[i] = signExtend( values_ptr[i], fmt );
+    switch(sign) {
+      case SIGNED:
+        for (int i = 0; i < nvals; i++) {
+            uint64_t tmp = (uint64_t)bits(reg, nbits * (i + 1) - 1, nbits * i);
+            values_ptr[i] = signExtend(tmp, fmt);
         }
         break;
-    case UNSIGNED:
-        for( i=0; i<nvals; i++ )
-        {
-            values_ptr[i] = (uint64_t)bits( reg, nbits*(i+1)-1, nbits*i );
+      case UNSIGNED:
+        for (int i = 0; i < nvals; i++) {
+            values_ptr[i] =
+                (uint64_t)bits(reg, nbits * (i + 1) - 1, nbits * i);
         }
         break;
     }
 }
 
 void
-MipsISA::writeDSPControl( uint32_t *dspctl, uint32_t value, uint32_t mask )
+MipsISA::writeDSPControl(uint32_t *dspctl, uint32_t value, uint32_t mask)
 {
     uint32_t fmask = 0;
 
-    if( mask & 0x01 ) fmask |= DSP_CTL_MASK[DSP_POS];
-    if( mask & 0x02 ) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
-    if( mask & 0x04 ) fmask |= DSP_CTL_MASK[DSP_C];
-    if( mask & 0x08 ) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
-    if( mask & 0x10 ) fmask |= DSP_CTL_MASK[DSP_CCOND];
-    if( mask & 0x20 ) fmask |= DSP_CTL_MASK[DSP_EFI];
+    if (mask & 0x01) fmask |= DSP_CTL_MASK[DSP_POS];
+    if (mask & 0x02) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
+    if (mask & 0x04) fmask |= DSP_CTL_MASK[DSP_C];
+    if (mask & 0x08) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
+    if (mask & 0x10) fmask |= DSP_CTL_MASK[DSP_CCOND];
+    if (mask & 0x20) fmask |= DSP_CTL_MASK[DSP_EFI];
 
     *dspctl &= ~fmask;
     value &= fmask;
@@ -1211,16 +1174,16 @@ MipsISA::writeDSPControl( uint32_t *dspctl, uint32_t value, uint32_t mask )
 }
 
 uint32_t
-MipsISA::readDSPControl( uint32_t *dspctl, uint32_t mask )
+MipsISA::readDSPControl(uint32_t *dspctl, uint32_t mask)
 {
     uint32_t fmask = 0;
 
-    if( mask & 0x01 ) fmask |= DSP_CTL_MASK[DSP_POS];
-    if( mask & 0x02 ) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
-    if( mask & 0x04 ) fmask |= DSP_CTL_MASK[DSP_C];
-    if( mask & 0x08 ) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
-    if( mask & 0x10 ) fmask |= DSP_CTL_MASK[DSP_CCOND];
-    if( mask & 0x20 ) fmask |= DSP_CTL_MASK[DSP_EFI];
+    if (mask & 0x01) fmask |= DSP_CTL_MASK[DSP_POS];
+    if (mask & 0x02) fmask |= DSP_CTL_MASK[DSP_SCOUNT];
+    if (mask & 0x04) fmask |= DSP_CTL_MASK[DSP_C];
+    if (mask & 0x08) fmask |= DSP_CTL_MASK[DSP_OUFLAG];
+    if (mask & 0x10) fmask |= DSP_CTL_MASK[DSP_CCOND];
+    if (mask & 0x20) fmask |= DSP_CTL_MASK[DSP_EFI];
 
-    return( *dspctl & fmask );
+    return *dspctl & fmask;
 }
diff --git a/src/arch/mips/dsp.hh b/src/arch/mips/dsp.hh
index fb8d5c4f6..fde4b332a 100755
--- a/src/arch/mips/dsp.hh
+++ b/src/arch/mips/dsp.hh
@@ -41,131 +41,164 @@ class ThreadContext;
 
 namespace MipsISA {
 
-    // SIMD formats
-    enum {
-        SIMD_FMT_L,    // long word
-        SIMD_FMT_W,    // word
-        SIMD_FMT_PH,   // paired halfword
-        SIMD_FMT_QB,   // quad byte
-        SIMD_NUM_FMTS
-    };
-
-    // DSPControl Fields
-    enum {
-        DSP_POS,       // insertion bitfield position
-        DSP_SCOUNT,    // insertion bitfield size
-        DSP_C,         // carry bit
-        DSP_OUFLAG,    // overflow-underflow flag
-        DSP_CCOND,     // condition code
-        DSP_EFI,       // extract fail indicator bit
-        DSP_NUM_FIELDS
-    };
-
-    // compare instruction operations
-    enum {
-        CMP_EQ,        // equal
-        CMP_LT,        // less than
-        CMP_LE         // less than or equal
-    };
-
-    // SIMD operation order modes
-    enum {
-        MODE_L,        // left
-        MODE_R,        // right
-        MODE_LA,       // left-alternate
-        MODE_RA,       // right-alternate
-        MODE_X         // cross
-    };
-
-    // dsp operation parameters
-    enum { UNSIGNED, SIGNED };
-    enum { NOSATURATE, SATURATE };
-    enum { NOROUND, ROUND };
-
-    // DSPControl field positions and masks
-    const uint32_t DSP_CTL_POS[DSP_NUM_FIELDS] = { 0, 7, 13, 16, 24, 14 };
-    const uint32_t DSP_CTL_MASK[DSP_NUM_FIELDS] = { 0x0000003f, 0x00001f80, 0x00002000,
-                                                    0x00ff0000, 0x0f000000, 0x00004000 };
-
-    // SIMD format constants
-    const uint32_t SIMD_MAX_VALS = 4; // maximum values per register
-    const uint32_t SIMD_NVALS[SIMD_NUM_FMTS] = { 1, 1, 2, 4 }; // number of values in fmt
-    const uint32_t SIMD_NBITS[SIMD_NUM_FMTS] = { 64, 32, 16, 8 }; // number of bits per value
-    const uint32_t SIMD_LOG2N[SIMD_NUM_FMTS] = { 6, 5, 4, 3 }; // log2( bits per value )
-
-    // DSP maximum values
-    const uint64_t FIXED_L_SMAX = ULL(0x7fffffffffffffff);
-    const uint64_t FIXED_W_SMAX = ULL(0x000000007fffffff);
-    const uint64_t FIXED_H_SMAX = ULL(0x0000000000007fff);
-    const uint64_t FIXED_B_SMAX = ULL(0x000000000000007f);
-    const uint64_t FIXED_L_UMAX = ULL(0xffffffffffffffff);
-    const uint64_t FIXED_W_UMAX = ULL(0x00000000ffffffff);
-    const uint64_t FIXED_H_UMAX = ULL(0x000000000000ffff);
-    const uint64_t FIXED_B_UMAX = ULL(0x00000000000000ff);
-    const uint64_t FIXED_SMAX[SIMD_NUM_FMTS] = { FIXED_L_SMAX, FIXED_W_SMAX, FIXED_H_SMAX, FIXED_B_SMAX };
-    const uint64_t FIXED_UMAX[SIMD_NUM_FMTS] = { FIXED_L_UMAX, FIXED_W_UMAX, FIXED_H_UMAX, FIXED_B_UMAX };
-
-    // DSP minimum values
-    const uint64_t FIXED_L_SMIN = ULL(0x8000000000000000);
-    const uint64_t FIXED_W_SMIN = ULL(0xffffffff80000000);
-    const uint64_t FIXED_H_SMIN = ULL(0xffffffffffff8000);
-    const uint64_t FIXED_B_SMIN = ULL(0xffffffffffffff80);
-    const uint64_t FIXED_L_UMIN = ULL(0x0000000000000000);
-    const uint64_t FIXED_W_UMIN = ULL(0x0000000000000000);
-    const uint64_t FIXED_H_UMIN = ULL(0x0000000000000000);
-    const uint64_t FIXED_B_UMIN = ULL(0x0000000000000000);
-    const uint64_t FIXED_SMIN[SIMD_NUM_FMTS] = { FIXED_L_SMIN, FIXED_W_SMIN, FIXED_H_SMIN, FIXED_B_SMIN };
-    const uint64_t FIXED_UMIN[SIMD_NUM_FMTS] = { FIXED_L_UMIN, FIXED_W_UMIN, FIXED_H_UMIN, FIXED_B_UMIN };
-
-    // DSP utility functions
-    int32_t bitrev( int32_t value );
-    uint64_t dspSaturate( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow );
-    uint64_t checkOverflow( uint64_t value, int32_t fmt, int32_t sign, uint32_t *overflow );
-    uint64_t signExtend( uint64_t value, int32_t signpos );
-    uint64_t addHalfLsb( uint64_t value, int32_t lsbpos );
-    int32_t dspAbs( int32_t a, int32_t fmt, uint32_t *dspctl );
-    int32_t dspAdd( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl );
-    int32_t dspAddh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign );
-    int32_t dspSub( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl );
-    int32_t dspSubh( int32_t a, int32_t b, int32_t fmt, int32_t round, int32_t sign );
-    int32_t dspShll( int32_t a, uint32_t sa, int32_t fmt, int32_t saturate, int32_t sign, uint32_t *dspctl );
-    int32_t dspShrl( int32_t a, uint32_t sa, int32_t fmt, int32_t sign );
-    int32_t dspShra( int32_t a, uint32_t sa, int32_t fmt, int32_t round, int32_t sign, uint32_t *dspctl );
-    int32_t dspMul( int32_t a, int32_t b, int32_t fmt, int32_t saturate, uint32_t *dspctl );
-    int32_t dspMulq( int32_t a, int32_t b, int32_t fmt, int32_t saturate, int32_t round, uint32_t *dspctl );
-    int32_t dspMuleu( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl );
-    int32_t dspMuleq( int32_t a, int32_t b, int32_t mode, uint32_t *dspctl );
-    int64_t dspDpaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
-                     int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl );
-    int64_t dspDpsq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t infmt,
-                     int32_t outfmt, int32_t postsat, int32_t mode, uint32_t *dspctl );
-    int64_t dspDpa( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, int32_t sign, int32_t mode );
-    int64_t dspDps( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, int32_t sign, int32_t mode );
-    int64_t dspMaq( int64_t dspac, int32_t a, int32_t b, int32_t ac,
-                    int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl );
-    int64_t dspMulsa( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt );
-    int64_t dspMulsaq( int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt, uint32_t *dspctl );
-    void dspCmp( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl );
-    int32_t dspCmpg( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op );
-    int32_t dspCmpgd( int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op, uint32_t *dspctl );
-    int32_t dspPrece( int32_t a, int32_t infmt, int32_t insign, int32_t outfmt, int32_t outsign, int32_t mode );
-    int32_t dspPrecrqu( int32_t a, int32_t b, uint32_t *dspctl );
-    int32_t dspPrecrq( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl );
-    int32_t dspPrecrSra( int32_t a, int32_t b, int32_t sa, int32_t fmt, int32_t round );
-    int32_t dspPick( int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl );
-    int32_t dspPack( int32_t a, int32_t b, int32_t fmt );
-    int32_t dspExtr( int64_t dspac, int32_t fmt, int32_t sa, int32_t round,
-                     int32_t saturate, uint32_t *dspctl );
-    int32_t dspExtp( int64_t dspac, int32_t size, uint32_t *dspctl );
-    int32_t dspExtpd( int64_t dspac, int32_t size, uint32_t *dspctl );
-
-    // SIMD pack/unpack utility functions
-    void simdPack( uint64_t *values_ptr, int32_t *reg, int32_t fmt );
-    void simdUnpack( int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign );
-
-    // DSPControl r/w utility functions
-    void writeDSPControl( uint32_t *dspctl, uint32_t value, uint32_t mask );
-    uint32_t readDSPControl( uint32_t *dspctl, uint32_t mask );
+// SIMD formats
+enum {
+    SIMD_FMT_L,    // long word
+    SIMD_FMT_W,    // word
+    SIMD_FMT_PH,   // paired halfword
+    SIMD_FMT_QB,   // quad byte
+    SIMD_NUM_FMTS
 };
 
-#endif
+// DSPControl Fields
+enum {
+    DSP_POS,       // insertion bitfield position
+    DSP_SCOUNT,    // insertion bitfield size
+    DSP_C,         // carry bit
+    DSP_OUFLAG,    // overflow-underflow flag
+    DSP_CCOND,     // condition code
+    DSP_EFI,       // extract fail indicator bit
+    DSP_NUM_FIELDS
+};
+
+// compare instruction operations
+enum {
+    CMP_EQ,        // equal
+    CMP_LT,        // less than
+    CMP_LE         // less than or equal
+};
+
+// SIMD operation order modes
+enum {
+    MODE_L,        // left
+    MODE_R,        // right
+    MODE_LA,       // left-alternate
+    MODE_RA,       // right-alternate
+    MODE_X         // cross
+};
+
+// dsp operation parameters
+enum { UNSIGNED, SIGNED };
+enum { NOSATURATE, SATURATE };
+enum { NOROUND, ROUND };
+
+// DSPControl field positions and masks
+const uint32_t DSP_CTL_POS[DSP_NUM_FIELDS] = { 0, 7, 13, 16, 24, 14 };
+const uint32_t DSP_CTL_MASK[DSP_NUM_FIELDS] =
+{ 0x0000003f, 0x00001f80, 0x00002000,
+  0x00ff0000, 0x0f000000, 0x00004000 };
+
+/*
+ * SIMD format constants
+ */
+
+// maximum values per register
+const uint32_t SIMD_MAX_VALS = 4;
+// number of values in fmt
+const uint32_t SIMD_NVALS[SIMD_NUM_FMTS] = { 1, 1, 2, 4 };
+// number of bits per value
+const uint32_t SIMD_NBITS[SIMD_NUM_FMTS] = { 64, 32, 16, 8 };
+// log2(bits per value)
+const uint32_t SIMD_LOG2N[SIMD_NUM_FMTS] = { 6, 5, 4, 3 };
+
+
+// DSP maximum values
+const uint64_t FIXED_L_SMAX = ULL(0x7fffffffffffffff);
+const uint64_t FIXED_W_SMAX = ULL(0x000000007fffffff);
+const uint64_t FIXED_H_SMAX = ULL(0x0000000000007fff);
+const uint64_t FIXED_B_SMAX = ULL(0x000000000000007f);
+const uint64_t FIXED_L_UMAX = ULL(0xffffffffffffffff);
+const uint64_t FIXED_W_UMAX = ULL(0x00000000ffffffff);
+const uint64_t FIXED_H_UMAX = ULL(0x000000000000ffff);
+const uint64_t FIXED_B_UMAX = ULL(0x00000000000000ff);
+const uint64_t FIXED_SMAX[SIMD_NUM_FMTS] =
+{ FIXED_L_SMAX, FIXED_W_SMAX, FIXED_H_SMAX, FIXED_B_SMAX };
+const uint64_t FIXED_UMAX[SIMD_NUM_FMTS] =
+{ FIXED_L_UMAX, FIXED_W_UMAX, FIXED_H_UMAX, FIXED_B_UMAX };
+
+// DSP minimum values
+const uint64_t FIXED_L_SMIN = ULL(0x8000000000000000);
+const uint64_t FIXED_W_SMIN = ULL(0xffffffff80000000);
+const uint64_t FIXED_H_SMIN = ULL(0xffffffffffff8000);
+const uint64_t FIXED_B_SMIN = ULL(0xffffffffffffff80);
+const uint64_t FIXED_L_UMIN = ULL(0x0000000000000000);
+const uint64_t FIXED_W_UMIN = ULL(0x0000000000000000);
+const uint64_t FIXED_H_UMIN = ULL(0x0000000000000000);
+const uint64_t FIXED_B_UMIN = ULL(0x0000000000000000);
+const uint64_t FIXED_SMIN[SIMD_NUM_FMTS] =
+{ FIXED_L_SMIN, FIXED_W_SMIN, FIXED_H_SMIN, FIXED_B_SMIN };
+const uint64_t FIXED_UMIN[SIMD_NUM_FMTS] =
+{ FIXED_L_UMIN, FIXED_W_UMIN, FIXED_H_UMIN, FIXED_B_UMIN };
+
+// DSP utility functions
+int32_t bitrev(int32_t value);
+uint64_t dspSaturate(uint64_t value, int32_t fmt, int32_t sign,
+                     uint32_t *overflow);
+uint64_t checkOverflow(uint64_t value, int32_t fmt, int32_t sign,
+                       uint32_t *overflow);
+uint64_t signExtend(uint64_t value, int32_t signpos);
+uint64_t addHalfLsb(uint64_t value, int32_t lsbpos);
+int32_t dspAbs(int32_t a, int32_t fmt, uint32_t *dspctl);
+int32_t dspAdd(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+               int32_t sign, uint32_t *dspctl);
+int32_t dspAddh(int32_t a, int32_t b, int32_t fmt, int32_t round,
+                int32_t sign);
+int32_t dspSub(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+               int32_t sign, uint32_t *dspctl);
+int32_t dspSubh(int32_t a, int32_t b, int32_t fmt, int32_t round,
+                int32_t sign);
+int32_t dspShll(int32_t a, uint32_t sa, int32_t fmt, int32_t saturate,
+                int32_t sign, uint32_t *dspctl);
+int32_t dspShrl(int32_t a, uint32_t sa, int32_t fmt, int32_t sign);
+int32_t dspShra(int32_t a, uint32_t sa, int32_t fmt, int32_t round,
+                int32_t sign, uint32_t *dspctl);
+int32_t dspMul(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+               uint32_t *dspctl);
+int32_t dspMulq(int32_t a, int32_t b, int32_t fmt, int32_t saturate,
+                int32_t round, uint32_t *dspctl);
+int32_t dspMuleu(int32_t a, int32_t b, int32_t mode, uint32_t *dspctl);
+int32_t dspMuleq(int32_t a, int32_t b, int32_t mode, uint32_t *dspctl);
+int64_t dspDpaq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+                int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
+                uint32_t *dspctl);
+int64_t dspDpsq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+                int32_t infmt, int32_t outfmt, int32_t postsat, int32_t mode,
+                uint32_t *dspctl);
+int64_t dspDpa(int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt,
+               int32_t sign, int32_t mode);
+int64_t dspDps(int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt,
+               int32_t sign, int32_t mode);
+int64_t dspMaq(int64_t dspac, int32_t a, int32_t b, int32_t ac,
+               int32_t fmt, int32_t mode, int32_t saturate, uint32_t *dspctl);
+int64_t dspMulsa(int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt);
+int64_t dspMulsaq(int64_t dspac, int32_t a, int32_t b, int32_t ac, int32_t fmt,
+                  uint32_t *dspctl);
+void dspCmp(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op,
+            uint32_t *dspctl);
+int32_t dspCmpg(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op);
+int32_t dspCmpgd(int32_t a, int32_t b, int32_t fmt, int32_t sign, int32_t op,
+                 uint32_t *dspctl);
+int32_t dspPrece(int32_t a, int32_t infmt, int32_t insign, int32_t outfmt,
+                 int32_t outsign, int32_t mode);
+int32_t dspPrecrqu(int32_t a, int32_t b, uint32_t *dspctl);
+int32_t dspPrecrq(int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl);
+int32_t dspPrecrSra(int32_t a, int32_t b, int32_t sa, int32_t fmt,
+                    int32_t round);
+int32_t dspPick(int32_t a, int32_t b, int32_t fmt, uint32_t *dspctl);
+int32_t dspPack(int32_t a, int32_t b, int32_t fmt);
+int32_t dspExtr(int64_t dspac, int32_t fmt, int32_t sa, int32_t round,
+                int32_t saturate, uint32_t *dspctl);
+int32_t dspExtp(int64_t dspac, int32_t size, uint32_t *dspctl);
+int32_t dspExtpd(int64_t dspac, int32_t size, uint32_t *dspctl);
+
+// SIMD pack/unpack utility functions
+void simdPack(uint64_t *values_ptr, int32_t *reg, int32_t fmt);
+void simdUnpack(int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign);
+
+// DSPControl r/w utility functions
+void writeDSPControl(uint32_t *dspctl, uint32_t value, uint32_t mask);
+uint32_t readDSPControl(uint32_t *dspctl, uint32_t mask);
+
+} /* namespace MipsISA */
+
+#endif // __ARCH_MIPS_DSP_HH__
-- 
2.30.2