From 03976aa5827a36ddec377b1f9767eb023796956f Mon Sep 17 00:00:00 2001 From: Ian Jiang Date: Wed, 19 Aug 2020 16:19:33 +0800 Subject: [PATCH] arch-riscv: Add float registers in copyRegs The origin copyRegs() does not include float registers. This patch fixes the problem. Change-Id: If4ad04b1eda6035486197879ff3e04ff32dd87bb Signed-off-by: Ian Jiang Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32934 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- src/arch/riscv/utility.hh | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh index 32eaff644..d4cf22175 100644 --- a/src/arch/riscv/utility.hh +++ b/src/arch/riscv/utility.hh @@ -127,6 +127,10 @@ copyRegs(ThreadContext *src, ThreadContext *dest) for (int i = 0; i < NumIntRegs; ++i) dest->setIntReg(i, src->readIntReg(i)); + // Second loop through the float registers. + for (int i = 0; i < NumFloatRegs; ++i) + dest->setFloatReg(i, src->readFloatReg(i)); + // Lastly copy PC/NPC dest->pcState(src->pcState()); } -- 2.30.2