From 039ba882cad069174275ed440e5e129c2e21b7bf Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 27 Apr 2021 11:56:31 +0000 Subject: [PATCH] also add blackboxes spblock512* etc. --- experiments9/freepdk_c4m45/Makefile | 7 +++++++ experiments9/tsmc_c018/Makefile | 10 +++++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/experiments9/freepdk_c4m45/Makefile b/experiments9/freepdk_c4m45/Makefile index 1a2db13..799c6f2 100755 --- a/experiments9/freepdk_c4m45/Makefile +++ b/experiments9/freepdk_c4m45/Makefile @@ -5,6 +5,11 @@ PHYSICAL_SYNTHESIS = Coriolis DESIGN_KIT = FreePDK_C4M45 YOSYS_FLATTEN = No + YOSYS_BLACKBOXES = pll \ + spblock512w64b8w_0 \ + spblock512w64b8w_1 \ + spblock512w64b8w_2 \ + spblock512w64b8w_3 # YOSYS_SET_TOP = Yes CHIP = chip CORE = ls180 @@ -46,3 +51,5 @@ cif: chip_r.cif view: cgt-chip_r sim: asimut-ls180_r + + diff --git a/experiments9/tsmc_c018/Makefile b/experiments9/tsmc_c018/Makefile index 0713bdb..25d0b31 100755 --- a/experiments9/tsmc_c018/Makefile +++ b/experiments9/tsmc_c018/Makefile @@ -4,7 +4,11 @@ DESIGN_KIT = FlexLib018 # DESIGN_KIT = cmos45 YOSYS_FLATTEN = No - YOSYS_BLACKBOXES = spblock_512w64b8w pll + YOSYS_BLACKBOXES = pll \ + spblock512w64b8w_0 \ + spblock512w64b8w_1 \ + spblock512w64b8w_2 \ + spblock512w64b8w_3 # YOSYS_SET_TOP = Yes CHIP = chip CORE = ls180 @@ -47,3 +51,7 @@ cif: chip_r.cif view: cgt-chip_r sim: asimut-ls180_r + + + + -- 2.30.2