From 03cf1532a70d705ada69dcb8ae79ae405a86b7da Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Wed, 6 Feb 2019 14:02:11 -0800
Subject: [PATCH] Extend testcase

---
 tests/simple/dff_init.v | 36 ++++++++++++++++++++++++++++++++++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/tests/simple/dff_init.v b/tests/simple/dff_init.v
index aad378346..be947042e 100644
--- a/tests/simple/dff_init.v
+++ b/tests/simple/dff_init.v
@@ -1,6 +1,5 @@
-module dff_test(n1, n1_inv, clk);
+module dff0_test(n1, n1_inv, clk);
   input clk;
-  (* init = 32'd0 *)
   output n1;
   reg n1 = 32'd0;
   output n1_inv;
@@ -8,3 +7,36 @@ module dff_test(n1, n1_inv, clk);
       n1 <= n1_inv;
   assign n1_inv = ~n1;
 endmodule
+
+module dff1_test(n1, n1_inv, clk);
+  input clk;
+  (* init = 32'd1 *)
+  output n1;
+  reg n1 = 32'd1;
+  output n1_inv;
+  always @(posedge clk)
+      n1 <= n1_inv;
+  assign n1_inv = ~n1;
+endmodule
+
+module dff0a_test(n1, n1_inv, clk);
+  input clk;
+  (* init = 32'd0 *) // Must be consistent with reg initialiser below
+  output n1;
+  reg n1 = 32'd0;
+  output n1_inv;
+  always @(posedge clk)
+      n1 <= n1_inv;
+  assign n1_inv = ~n1;
+endmodule
+
+module dff1a_test(n1, n1_inv, clk);
+  input clk;
+  (* init = 32'd1 *) // Must be consistent with reg initialiser below
+  output n1;
+  reg n1 = 32'd1;
+  output n1_inv;
+  always @(posedge clk)
+      n1 <= n1_inv;
+  assign n1_inv = ~n1;
+endmodule
-- 
2.30.2