From 03e3f5513452aeb0cdf6c72702c3c66424af5af7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 4 Nov 2020 19:10:28 +0000 Subject: [PATCH] move back to 3.3v on X3 VERSA ECP5 connector --- src/soc/litex/florent/versa_ecp5.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/soc/litex/florent/versa_ecp5.py b/src/soc/litex/florent/versa_ecp5.py index 464e9412..487c96bd 100755 --- a/src/soc/litex/florent/versa_ecp5.py +++ b/src/soc/litex/florent/versa_ecp5.py @@ -43,10 +43,10 @@ class VersaECP5TestSoC(versa_ecp5.BaseSoC): # define the pins, add as an extension, *then* request it jtag_ios = [ ("jtag", 0, - Subsignal("tdi", Pins("B19"), IOStandard("LVCMOS25")), - Subsignal("tms", Pins("B12"), IOStandard("LVCMOS25")), - Subsignal("tck", Pins("B9"), IOStandard("LVCMOS25")), - Subsignal("tdo", Pins("E6"), IOStandard("LVCMOS25")), + Subsignal("tdi", Pins("B19"), IOStandard("LVCMOS33")), + Subsignal("tms", Pins("B12"), IOStandard("LVCMOS33")), + Subsignal("tck", Pins("B9"), IOStandard("LVCMOS33")), + Subsignal("tdo", Pins("E6"), IOStandard("LVCMOS33")), ) ] self.platform.add_extension(jtag_ios) -- 2.30.2