From 03f73c7fc6666c904ec0ad07c6aaaf175bc41291 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 6 Nov 2019 21:47:23 -0500 Subject: [PATCH] nir: Add load_output_u8_as_fp16_pan intrinsic This is a single opcode, at least on newer Midgard chips. It's easier to have this represented in NIR rather than trying to optimize out the conversions, so let's add the intrinsic. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Tomeu Vizoso --- src/compiler/nir/nir_intrinsics.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index 4658187ea16..ce10dd22d6c 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -836,10 +836,16 @@ intrinsic("load_global_ir3", [2, 1], dest_comp=0, indices=[ACCESS, ALIGN_MUL, AL # One notable divergence is sRGB, which is asymmetric: raw_input_pan requires # an sRGB->linear conversion, but linear values should be written to # raw_output_pan and the hardware handles linear->sRGB. +# +# We also have format-specific Midgard intrinsics. There are rather +# here-be-dragons. load_output_u8_as_fp16_pan does the equivalent of +# load_raw_out_pan on an RGBA8 UNORM framebuffer followed by u2u16 -> fp16 -> +# division by 255. # src[] = { value } store("raw_output_pan", 1, []) load("raw_output_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER]) +load("output_u8_as_fp16_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER]) # V3D-specific instrinc for tile buffer color reads. # -- 2.30.2