From 040e314143f973968169bab8ef379bac68fc8626 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Wed, 6 Jan 2016 15:30:39 -0800 Subject: [PATCH] i965/compiler: Enable more lowering in NIR We don't need these for GLSL or ARB, but we need them for SPIR-V Reviewed-by: Iago Toral Quiroga Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_shader.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 4bd24a70b55..49ff835fa85 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -104,6 +104,13 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo) */ nir_options->lower_ffma = true; nir_options->lower_sub = true; + nir_options->lower_fdiv = true; + nir_options->lower_scmp = true; + nir_options->lower_fmod = true; + nir_options->lower_bitfield_insert = true; + nir_options->lower_uadd_carry = true; + nir_options->lower_usub_borrow = true; + /* In the vec4 backend, our dpN instruction replicates its result to all * the components of a vec4. We would like NIR to give us replicated fdot * instructions because it can optimize better for us. -- 2.30.2