From 041bf4122676bc44f8b1c8348873c2a79a39613b Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 5 Jan 2019 10:57:37 +0100 Subject: [PATCH] soc/integration/cpu_interface: generate name for Memories in get_csr_header --- litex/soc/integration/cpu_interface.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex/soc/integration/cpu_interface.py b/litex/soc/integration/cpu_interface.py index 147d65e8..49acb5aa 100644 --- a/litex/soc/integration/cpu_interface.py +++ b/litex/soc/integration/cpu_interface.py @@ -137,6 +137,7 @@ def get_csr_header(regions, constants, with_access_functions=True, with_shadow_b if not with_shadow_base: origin &= (~shadow_base) if isinstance(obj, Memory): + r += "\n/* "+name+" */\n" r += "#define CSR_"+name.upper()+"_BASE "+hex(origin)+"\n" else: r += "\n/* "+name+" */\n" -- 2.30.2