From 041dae869fd8e68582fd5441b572145a4bdacce9 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 3 Nov 2018 10:17:39 +0000 Subject: [PATCH] add reshape data structures and get_shape function --- riscv/processor.cc | 13 +++++++++++++ riscv/processor.h | 5 +++++ riscv/sv.h | 13 +++++++++++++ 3 files changed, 31 insertions(+) diff --git a/riscv/processor.cc b/riscv/processor.cc index 9df3698..5c95f8c 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -157,6 +157,19 @@ sv_csr_t &state_t::sv() return get_usv(); } +sv_shape_t* state_t::get_shape(reg_t reg) +{ + if (prv == PRV_M || prv == PRV_S || reg == 0) { + return NULL; + } + for (int i = 0; i < 3; i++) { + if (remap[i].regidx == reg) { + return &shape[i]; + } + } + return NULL; +} + void processor_t::set_debug(bool value) { debug = value; diff --git a/riscv/processor.h b/riscv/processor.h index 7d2a609..4e8cd3b 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -160,6 +160,11 @@ struct state_t sv_csr_t &get_ssv() { return ssv; } sv_csr_t &get_usv() { return usv; } + sv_remap_t remap[3]; + sv_shape_t shape[3]; + + sv_shape_t *get_shape(reg_t reg); + #endif uint32_t fflags; diff --git a/riscv/sv.h b/riscv/sv.h index af4402a..89ed2e9 100644 --- a/riscv/sv.h +++ b/riscv/sv.h @@ -71,4 +71,17 @@ typedef struct { bool sv_check_reg(bool intreg, uint64_t reg); +typedef struct { + uint64_t regidx: 7; // actual i.e. real register (0-127) + unsigned int shape: 2; // which shape register to use +} sv_remap_t; + +typedef struct { + int xsz; + int ysz; + int zsz; + int offs; + int permute; +} sv_shape_t; + #endif -- 2.30.2