From 046e0a667d2439237e8a1d285654898b027897fe Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Tue, 23 Feb 2021 17:35:14 +0000
Subject: [PATCH]

---
 openpower/sv/implementation.mdwn | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn
index c2018946d..f39639cd9 100644
--- a/openpower/sv/implementation.mdwn
+++ b/openpower/sv/implementation.mdwn
@@ -120,6 +120,10 @@ SV's SVSTATE context is effectively a Sub-PC.  On exceptions the PC is saved int
 * TestIssuer: TODO
 * Microwatt: TODO
 
+## Illegal instruction exceptions
+
+Anything not listed as SVP64 extended must raise an illegal exception if prefixed. setvl, branch, mtmsr, mfmsr at the minimum.
+
 ## VL for-loop
 
 main SV for-loop, as a FSM, updating `SVSTATE.srcstep`, using it as the index in the for-loop from 0 to VL-1.  Register numbers are incremented by one if marked as vector.
-- 
2.30.2