From 04e5f7e8a9ecd7ffa6e5cd81317e53899e397f1c Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Fri, 9 Aug 2019 10:02:50 -0700 Subject: [PATCH] intel/blorp: Treat HIZ_CCS like HiZ Allow it in depth buffer instructions but disable it for blits. Reviewed-by: Kenneth Graunke --- src/intel/blorp/blorp_genX_exec.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index cb2d2536899..fca7ae6b779 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1356,7 +1356,7 @@ blorp_emit_surface_state(struct blorp_batch *batch, } /* Blorp doesn't support HiZ in any of the blit or slow-clear paths */ - assert(surface->aux_usage != ISL_AUX_USAGE_HIZ); + assert(!isl_aux_usage_has_hiz(surface->aux_usage)); enum isl_aux_usage aux_usage = surface->aux_usage; isl_channel_mask_t write_disable_mask = 0; @@ -1572,7 +1572,7 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch, params->depth.addr, 0); info.hiz_usage = params->depth.aux_usage; - if (info.hiz_usage == ISL_AUX_USAGE_HIZ) { + if (isl_aux_usage_has_hiz(info.hiz_usage)) { info.hiz_surf = ¶ms->depth.aux_surf; struct blorp_address hiz_address = params->depth.aux_addr; -- 2.30.2