From 04e6a8d1ae5b8a08f5904d4847453fadf25303eb Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 9 Jul 2020 19:59:45 +0100 Subject: [PATCH] DIV overflow needs to be copied into both bits of XER.ov (OV, OV32) --- src/soc/fu/div/output_stage.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/fu/div/output_stage.py b/src/soc/fu/div/output_stage.py index 9eb16f6c..0af52151 100644 --- a/src/soc/fu/div/output_stage.py +++ b/src/soc/fu/div/output_stage.py @@ -71,7 +71,7 @@ class DivOutputStage(PipeModBase): | ((abs_quotient == sign_bit_mask) & ~self.quotient_neg)) with m.Else(): - comb += xer_ov.eq(overflow) + comb += xer_ov.eq(Repl(overflow, 2)) # set OV _and_ OV32 with m.If(op.is_32bit): calc_overflow(self.i.dive_abs_ov32, 0x80000000) -- 2.30.2