From 0547173960db190acc75e7017bf8d2e89706a5ee Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy Date: Fri, 26 Jan 2018 10:46:56 +0000 Subject: [PATCH] Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny gcc/testsuite/ChangeLog: 2018-01-26 Szabolcs Nagy * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler. * gcc.target/aarch64/sve/peel_ind_2.c: Likewise. * gcc.target/aarch64/sve/peel_ind_3.c: Likewise. From-SVN: r257078 --- gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c | 2 +- 4 files changed, 9 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5df5351a932..2402caab4d7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2018-01-26 Szabolcs Nagy + + * gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler. + * gcc.target/aarch64/sve/peel_ind_2.c: Likewise. + * gcc.target/aarch64/sve/peel_ind_3.c: Likewise. + 2018-01-26 Richard Biener PR tree-optimization/81082 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c index 864026499cd..a064c337b67 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_1.c @@ -21,7 +21,7 @@ foo (void) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* We should use an induction that starts at -5, with only the last 7 elements of the first iteration being active. */ /* { dg-final { scan-assembler {\tindex\tz[0-9]+\.s, #-5, #5\n} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c index 2bfc09a7602..f2113be90a7 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c @@ -17,6 +17,6 @@ foo (void) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* We should unroll the loop three times. */ /* { dg-final { scan-assembler-times "\tst1w\t" 3 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c index 8364dc6107a..441589eef60 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/peel_ind_3.c @@ -17,5 +17,5 @@ foo (int start) } /* We should operate on aligned vectors. */ -/* { dg-final { scan-assembler {\tadrp\tx[0-9]+, x\n} } } */ +/* { dg-final { scan-assembler {\t(adrp|adr)\tx[0-9]+, x\n} } } */ /* { dg-final { scan-assembler {\tubfx\t} } } */ -- 2.30.2