From 05520ba490c9463391f438c341243d52a00a7168 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 7 Aug 2015 19:18:55 +0100 Subject: [PATCH] i965: Remove use of deprecated drm_intel_aub routines MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit With mesa/drm commit cd2f91e18db087edf93fed828e568ee53b887860 Author: Kristian Høgsberg Kristensen Date: Fri Jul 31 10:47:50 2015 -0700 intel: Drop aub dumping functionality the drm_intel_aub routines are mere stubs and do nothing. Likewise remove our invocations. Signed-off-by: Chris Wilson Reviewed-by: Kenneth Graunke --- src/intel/common/gen_debug.c | 1 - src/intel/common/gen_debug.h | 37 ++++++++------- src/mesa/drivers/dri/i965/brw_context.c | 6 --- src/mesa/drivers/dri/i965/brw_context.h | 1 - src/mesa/drivers/dri/i965/brw_state_batch.c | 46 +------------------ src/mesa/drivers/dri/i965/intel_batchbuffer.c | 3 -- src/mesa/drivers/dri/i965/intel_screen.c | 40 ---------------- src/mesa/drivers/dri/i965/intel_screen.h | 1 - 8 files changed, 19 insertions(+), 116 deletions(-) diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c index 96efdab65f7..1e0ba573c47 100644 --- a/src/intel/common/gen_debug.c +++ b/src/intel/common/gen_debug.c @@ -62,7 +62,6 @@ static const struct debug_control debug_control[] = { { "urb", DEBUG_URB }, { "vs", DEBUG_VS }, { "clip", DEBUG_CLIP }, - { "aub", DEBUG_AUB }, { "shader_time", DEBUG_SHADER_TIME }, { "no16", DEBUG_NO16 }, { "blorp", DEBUG_BLORP }, diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h index 24ed7d4bc1b..db13a06cc9e 100644 --- a/src/intel/common/gen_debug.h +++ b/src/intel/common/gen_debug.h @@ -60,25 +60,24 @@ extern uint64_t INTEL_DEBUG; #define DEBUG_URB (1ull << 18) #define DEBUG_VS (1ull << 19) #define DEBUG_CLIP (1ull << 20) -#define DEBUG_AUB (1ull << 21) -#define DEBUG_SHADER_TIME (1ull << 22) -#define DEBUG_BLORP (1ull << 23) -#define DEBUG_NO16 (1ull << 24) -#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 25) -#define DEBUG_OPTIMIZER (1ull << 26) -#define DEBUG_ANNOTATION (1ull << 27) -#define DEBUG_NO8 (1ull << 28) -#define DEBUG_VEC4VS (1ull << 29) -#define DEBUG_SPILL_FS (1ull << 30) -#define DEBUG_SPILL_VEC4 (1ull << 31) -#define DEBUG_CS (1ull << 32) -#define DEBUG_HEX (1ull << 33) -#define DEBUG_NO_COMPACTION (1ull << 34) -#define DEBUG_TCS (1ull << 35) -#define DEBUG_TES (1ull << 36) -#define DEBUG_L3 (1ull << 37) -#define DEBUG_DO32 (1ull << 38) -#define DEBUG_NO_RBC (1ull << 39) +#define DEBUG_SHADER_TIME (1ull << 21) +#define DEBUG_BLORP (1ull << 22) +#define DEBUG_NO16 (1ull << 23) +#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 24) +#define DEBUG_OPTIMIZER (1ull << 25) +#define DEBUG_ANNOTATION (1ull << 26) +#define DEBUG_NO8 (1ull << 27) +#define DEBUG_VEC4VS (1ull << 28) +#define DEBUG_SPILL_FS (1ull << 29) +#define DEBUG_SPILL_VEC4 (1ull << 30) +#define DEBUG_CS (1ull << 31) +#define DEBUG_HEX (1ull << 32) +#define DEBUG_NO_COMPACTION (1ull << 33) +#define DEBUG_TCS (1ull << 34) +#define DEBUG_TES (1ull << 35) +#define DEBUG_L3 (1ull << 36) +#define DEBUG_DO32 (1ull << 37) +#define DEBUG_NO_RBC (1ull << 38) #ifdef HAVE_ANDROID_PLATFORM #define LOG_TAG "INTEL-MESA" diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index cd3b53a5e0f..c8e7cc16809 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -1154,12 +1154,6 @@ intelDestroyContext(__DRIcontext * driContextPriv) (struct brw_context *) driContextPriv->driverPrivate; struct gl_context *ctx = &brw->ctx; - /* Dump a final BMP in case the application doesn't call SwapBuffers */ - if (INTEL_DEBUG & DEBUG_AUB) { - intel_batchbuffer_flush(brw); - aub_dump_bmp(&brw->ctx); - } - _mesa_meta_free(&brw->ctx); if (INTEL_DEBUG & DEBUG_SHADER_TIME) { diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 893619117fa..96e225cbd1e 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1261,7 +1261,6 @@ void brw_store_data_imm64(struct brw_context *brw, drm_intel_bo *bo, * brw_state_dump.c */ void brw_debug_batch(struct brw_context *brw); -void brw_annotate_aub(struct brw_context *brw); /*====================================================================== * intel_tex_validate.c diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c b/src/mesa/drivers/dri/i965/brw_state_batch.c index 9658b48ca13..80c012b108f 100644 --- a/src/mesa/drivers/dri/i965/brw_state_batch.c +++ b/src/mesa/drivers/dri/i965/brw_state_batch.c @@ -59,50 +59,6 @@ brw_track_state_batch(struct brw_context *brw, brw->state_batch_count++; } -/** - * Convenience function to populate a single drm_intel_aub_annotation data - * structure. - */ -static inline void -make_annotation(drm_intel_aub_annotation *annotation, uint32_t type, - uint32_t subtype, uint32_t ending_offset) -{ - annotation->type = type; - annotation->subtype = subtype; - annotation->ending_offset = ending_offset; -} - -/** - * Generate a set of aub file annotations for the current batch buffer, and - * deliver them to DRM. - * - * The "used" section of the batch buffer (the portion containing batch - * commands) is annotated with AUB_TRACE_TYPE_BATCH. The remainder of the - * batch buffer (which contains data structures pointed to by batch commands) - * is annotated according to the type of each data structure. - */ -void -brw_annotate_aub(struct brw_context *brw) -{ - unsigned annotation_count = 2 * brw->state_batch_count + 1; - drm_intel_aub_annotation annotations[annotation_count]; - int a = 0; - make_annotation(&annotations[a++], AUB_TRACE_TYPE_BATCH, 0, - 4 * USED_BATCH(brw->batch)); - for (int i = brw->state_batch_count; i-- > 0; ) { - uint32_t type = brw->state_batch_list[i].type; - uint32_t start_offset = brw->state_batch_list[i].offset; - uint32_t end_offset = start_offset + brw->state_batch_list[i].size; - make_annotation(&annotations[a++], AUB_TRACE_TYPE_NOTYPE, 0, - start_offset); - make_annotation(&annotations[a++], AUB_TRACE_TYPE(type), - AUB_TRACE_SUBTYPE(type), end_offset); - } - assert(a == annotation_count); - drm_intel_bufmgr_gem_set_aub_annotations(brw->batch.bo, annotations, - annotation_count); -} - /** * Allocates a block of space in the batchbuffer for indirect state. * @@ -144,7 +100,7 @@ __brw_state_batch(struct brw_context *brw, batch->state_batch_offset = offset; - if (unlikely(INTEL_DEBUG & (DEBUG_BATCH | DEBUG_AUB))) + if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) brw_track_state_batch(brw, type, offset, size, index); *out_offset = offset; diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index ae0fd4cd7ab..afa061d70df 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -343,9 +343,6 @@ do_flush_locked(struct brw_context *brw, int in_fence_fd, int *out_fence_fd) flags |= I915_EXEC_GEN7_SOL_RESET; if (ret == 0) { - if (unlikely(INTEL_DEBUG & DEBUG_AUB)) - brw_annotate_aub(brw); - if (brw->hw_ctx == NULL || batch->ring != RENDER_RING) { assert(in_fence_fd == -1); assert(out_fence_fd == NULL); diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 9cd2a657d8d..21786eb54ab 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -123,39 +123,6 @@ get_time(void) return tp.tv_sec + tp.tv_nsec / 1000000000.0; } -void -aub_dump_bmp(struct gl_context *ctx) -{ - struct gl_framebuffer *fb = ctx->DrawBuffer; - - for (unsigned i = 0; i < fb->_NumColorDrawBuffers; i++) { - struct intel_renderbuffer *irb = - intel_renderbuffer(fb->_ColorDrawBuffers[i]); - - if (irb && irb->mt) { - enum aub_dump_bmp_format format; - - switch (irb->Base.Base.Format) { - case MESA_FORMAT_B8G8R8A8_UNORM: - case MESA_FORMAT_B8G8R8X8_UNORM: - format = AUB_DUMP_BMP_FORMAT_ARGB_8888; - break; - default: - continue; - } - - drm_intel_gem_bo_aub_dump_bmp(irb->mt->bo, - irb->draw_x, - irb->draw_y, - irb->Base.Base.Width, - irb->Base.Base.Height, - format, - irb->mt->pitch, - 0); - } - } -} - static const __DRItexBufferExtension intelTexBufferExtension = { .base = { __DRI_TEX_BUFFER, 3 }, @@ -188,10 +155,6 @@ intel_dri2_flush_with_flags(__DRIcontext *cPriv, brw->need_flush_throttle = true; intel_batchbuffer_flush(brw); - - if (INTEL_DEBUG & DEBUG_AUB) { - aub_dump_bmp(ctx); - } } /** @@ -1689,9 +1652,6 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) INTEL_DEBUG &= ~DEBUG_SHADER_TIME; } - if (INTEL_DEBUG & DEBUG_AUB) - drm_intel_bufmgr_gem_set_aub_dump(screen->bufmgr, true); - if (intel_get_integer(screen, I915_PARAM_MMAP_GTT_VERSION) >= 1) { /* Theorectically unlimited! At least for individual objects... * diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h index 41db83bb679..d8cda58c964 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.h +++ b/src/mesa/drivers/dri/i965/intel_screen.h @@ -118,7 +118,6 @@ intelMakeCurrent(__DRIcontext * driContextPriv, __DRIdrawable * driReadPriv); double get_time(void); -void aub_dump_bmp(struct gl_context *ctx); const int* intel_supported_msaa_modes(const struct intel_screen *screen); -- 2.30.2