From 0568761f8e7b9249ec8cffbd7826c24e38bf16d6 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Wed, 25 Sep 2019 10:10:39 -0700 Subject: [PATCH] nir: Add a new ALU nir_op_imul24 Some hardware can do 24b multiply in a single instruction, but not 32b. However in most cases 24b is sufficient for address/offset calculation. Signed-off-by: Rob Clark Acked-by: Jason Ekstrand Reviewed-by: Kristian H. Kristensen Reviewed-by: Eduardo Lima Mitev --- src/compiler/nir/nir_opcodes.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py index b759910cd80..4bb21ea1358 100644 --- a/src/compiler/nir/nir_opcodes.py +++ b/src/compiler/nir/nir_opcodes.py @@ -1061,3 +1061,6 @@ dst.x = ((((src0.x & 0xffff0000) >> 16) * (src1.x & 0x0000ffff)) << 16) + src2.x triop("imad24_ir3", tint32, _2src_commutative, "(((int32_t)src0 << 8) >> 8) * (((int32_t)src1 << 8) >> 8) + src2") +# 24b multiply into 32b result (with sign extension) +binop("imul24", tint32, _2src_commutative + associative, + "(((int32_t)src0 << 8) >> 8) * (((int32_t)src1 << 8) >> 8)") -- 2.30.2