From 0589eaecde2fc0fa35fb2e0c54d76db7b6467498 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 7 Oct 2013 11:27:22 -0700 Subject: [PATCH] i965/blorp: Explain why Z24 can't use a sensible format. We could conceivably use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS for Z24 source images, allowing conversions from Z24 to either Z16 or Z32F. Unfortunately, we can't use it for destination images since it isn't supported as a render target. Using different formats for sources or destinations would be painful, so for now, punt. Signed-off-by: Kenneth Graunke Reviewed-by: Ian Romanick Reviewed-by: Chad Versace Reviewed-by: Eric Anholt Reviewed-by: Daniel Vetter --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index f71db4f88d8..c59bb663a76 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -86,7 +86,11 @@ brw_blorp_surface_info::set(struct brw_context *brw, this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM; break; case MESA_FORMAT_X8_Z24: - /* The miptree consists of 32 bits per pixel, arranged as 24-bit depth + /* It would make sense to use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS + * here, but unfortunately it isn't supported as a render target, which + * would prevent us from blitting to 24-bit depth. + * + * The miptree consists of 32 bits per pixel, arranged as 24-bit depth * values interleaved with 8 "don't care" bits. Since depth values don't * require any blending, it doesn't matter how we interpret the bit * pattern as long as we copy the right amount of data, so just map it -- 2.30.2