From 060233500c2d87f7a8569fe5bef8b5528360e52d Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 12 Jun 2019 17:05:38 +0100 Subject: [PATCH] --- isa_conflict_resolution/isamux_isans.mdwn | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/isa_conflict_resolution/isamux_isans.mdwn b/isa_conflict_resolution/isamux_isans.mdwn index 185a98a46..27dd0ef1b 100644 --- a/isa_conflict_resolution/isamux_isans.mdwn +++ b/isa_conflict_resolution/isamux_isans.mdwn @@ -1,23 +1,25 @@ # Note-form on ISAMUX (aka "ISANS") -A fixed number of additional (hidden) bits that go directly and non-optionally +A fixed number of additional (hidden) bits, conceptually a "namespace", that go directly and non-optionally into the instruction decode phase, extending (in each implementation) the opcode length to 16+N, 32+N, 48+N, where N is a hard fixed quantity on a per-implementor basis. Where the opcode is normally loaded from the location at the PC, the extra -bits are instead set via a CSR: hence why they are described as "hidden". +bits are instead set via a CSR and mandatorially appended to every instruction: hence why they are described as "hidden" opcode bits, and as a "namespace". + +The parallels with c++ "using namespace" are direct and clear. # Hypothetical Format - +~~~ 3 2 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 reserved | | | foreignarch |1| reserved | | |B| rvcpage |0| - +~~~ RV Mode -- 2.30.2