From 062c52bae2fc1b97601d0d8b55492ece4b24ccef Mon Sep 17 00:00:00 2001
From: Sandipan Das <sandipan@linux.ibm.com>
Date: Sat, 6 Feb 2021 17:19:40 +0530
Subject: [PATCH] arch-power: Fix compare instructions

Now that 64-bit registers are being used, instead of always
performing a 32-bit comparison, these instructions must use
the L field to determine the type of comparison to be made.
The comparison can either be 32-bit or 64-bit. This fixes
the following instructions.
  * Compare (cmp)
  * Compare Logical (cmpl)
  * Compare Immediate (cmpi)
  * Compare Logical Immediate (cmpli)

Change-Id: Ia7655ffa463214c24e094e01d4188decf6486904
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
---
 src/arch/power/isa/decoder.isa | 28 ++++++++++++++++++++++------
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index d623506ff..63d3afc14 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -236,14 +236,22 @@ decode PO default Unknown::unknown() {
 
     format IntImmCompOp {
         11: cmpi({{
-            cr = makeCRField(Ra_sw, (int32_t)simm, xer.so);
-            }});
+            if (length) {
+                cr = makeCRField(Ra_sd, simm, xer.so);
+            } else {
+                cr = makeCRField((int32_t)Ra_sd, simm, xer.so);
+            }
+        }});
     }
 
     format IntImmCompLogicOp {
         10: cmpli({{
-            cr = makeCRField(Ra, (uint32_t)uimm, xer.so);
-            }});
+            if (length) {
+                cr = makeCRField(Ra, uimm, xer.so);
+            } else {
+                cr = makeCRField((uint32_t)Ra, uimm, xer.so);
+            }
+        }});
      }
 
     format IntImmLogicOp {
@@ -436,11 +444,19 @@ decode PO default Unknown::unknown() {
 
         format IntCompOp {
             0: cmp({{
-                cr = makeCRField(Ra_sw, Rb_sw, xer.so);
+                if (length) {
+                    cr = makeCRField(Ra_sd, Rb_sd, xer.so);
+                } else {
+                    cr = makeCRField((int32_t)Ra_sd, (int32_t)Rb_sd, xer.so);
+                }
             }});
 
             32: cmpl({{
-                cr = makeCRField(Ra, Rb, xer.so);
+                if (length) {
+                    cr = makeCRField(Ra, Rb, xer.so);
+                } else {
+                    cr = makeCRField((uint32_t)Ra, (uint32_t)Rb, xer.so);
+                }
             }});
         }
 
-- 
2.30.2