From 065fa8a1362ef88c552b4ad421e599b6ddacdd54 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 26 Sep 2002 03:16:44 -0700 Subject: [PATCH] re PR target/7842 ([REGRESSION] sparc code gen bug) 2002-09-25 David S. Miller PR target/7842 * gcc.c-torture/execute/shiftdi.c: New test. From-SVN: r57533 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.c-torture/execute/shiftdi.c | 20 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 gcc/testsuite/gcc.c-torture/execute/shiftdi.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8be94f028d9..8d5d331e8f7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2002-09-25 David S. Miller + + PR target/7842 + * gcc.c-torture/execute/shiftdi.c: New test. + 2002-09-26 Richard Earnshaw * lib/gcc.exp (gcc_init): Use a filename for the testglue that is diff --git a/gcc/testsuite/gcc.c-torture/execute/shiftdi.c b/gcc/testsuite/gcc.c-torture/execute/shiftdi.c new file mode 100644 index 00000000000..44f0dfc2bce --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/shiftdi.c @@ -0,0 +1,20 @@ +/* Failed on sparc with -mv8plus because sparc.c:set_extends() thought + erroneously that SImode ASHIFT chops the upper bits, it does not. */ + +typedef unsigned long long uint64; + +void g(uint64 x, int y, int z, uint64 *p) +{ + unsigned w = ((x >> y) & 0xffffffffULL) << (z & 0x1f); + *p |= (w & 0xffffffffULL) << z; +} + +int main(void) +{ + uint64 a = 0; + g(0xdeadbeef01234567ULL, 0, 0, &a); + return (a == 0x01234567) ? 0 : 1; +} + + + -- 2.30.2