From 068b9283df32df61c860802e551a66284df9bbcf Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 13 Dec 2020 16:51:08 +0000 Subject: [PATCH] --- openpower/sv/mv.vec.mdwn | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/openpower/sv/mv.vec.mdwn b/openpower/sv/mv.vec.mdwn index 1b6572bec..84687102c 100644 --- a/openpower/sv/mv.vec.mdwn +++ b/openpower/sv/mv.vec.mdwn @@ -7,4 +7,20 @@ Basic idea: mv operations where either the src or dest is specifically marked as mv.srcvec r3, r4.vec2 mv.destvec r2.vec4, r5 -TODO: evaluate whether this will fit with [[mv.swizzle]] involved as well. +TODO: evaluate whether this will fit with [[mv.swizzle]] involved as well +(yes it probably will) + +* when SUBVL=1 (disabled) the mv is a straight vector mv. +* when SUBVL=2/3/4, mv.vec kicks in. M=0 is mv.srcvec, M=1 is mv.destvec + +mv.srcvec (leaving out elwidths and chop): + + for i in range(VL): + regs[rd+i] = regs[rs+i*SUBVL] + +mv.destvec (leaving out elwidths and chop): + + for i in range(VL): + regs[rd+i*SUBVL] = regs[rs+i] + + -- 2.30.2