From 069bf7c9078a1b03414a6ace4bbff887e212ab90 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Fri, 30 Jun 2017 15:11:15 -0700 Subject: [PATCH] i965/fs: Match destination type to size for ballot No use in taking a 64-bit value when we know the high 32-bits are zero. --- src/intel/compiler/brw_compiler.c | 2 +- src/intel/compiler/brw_fs_nir.cpp | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index e86ab0fc687..27fea4c8a00 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -58,7 +58,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = { .lower_unpack_unorm_2x16 = true, .lower_unpack_unorm_4x8 = true, .lower_subgroup_masks = true, - .max_subgroup_size = 64, /* FIXME */ + .max_subgroup_size = 32, .max_unroll_iterations = 32, }; diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 74f90dabeac..d760946e624 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -4189,7 +4189,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr bld.exec_all().MOV(flag, brw_imm_ud(0u)); bld.CMP(bld.null_reg_ud(), value, brw_imm_ud(0u), BRW_CONDITIONAL_NZ); - dest.type = BRW_REGISTER_TYPE_UQ; + if (instr->dest.ssa.bit_size > 32) { + dest.type = BRW_REGISTER_TYPE_UQ; + } else { + dest.type = BRW_REGISTER_TYPE_UD; + } bld.MOV(dest, flag); break; } -- 2.30.2