From 07433760e3311ff17c0f909514ececdae9f6e9c6 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Thu, 25 Jun 2015 08:20:01 -0700 Subject: [PATCH] i965: Trivial formatting changes in brw_misc_state.c Signed-off-by: Ian Romanick Acked-by: Jason Ekstrand Reviewed-by: Juha-Pekka Heikkila --- src/mesa/drivers/dri/i965/brw_misc_state.c | 49 ++++++++++------------ 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 16b0ed28d0d..e9d9467d330 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -44,7 +44,8 @@ #include "main/glformats.h" /* Constant single cliprect for framebuffer object or DRI2 drawing */ -static void upload_drawing_rect(struct brw_context *brw) +static void +upload_drawing_rect(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; const struct gl_framebuffer *fb = ctx->DrawBuffer; @@ -73,7 +74,8 @@ const struct brw_tracked_state brw_drawing_rect = { * The state pointers in this packet are all relative to the general state * base address set by CMD_STATE_BASE_ADDRESS, which is 0. */ -static void upload_pipelined_state_pointers(struct brw_context *brw ) +static void +upload_pipelined_state_pointers(struct brw_context *brw) { if (brw->gen == 5) { /* Need to flush before changing clip max threads for errata. */ @@ -104,7 +106,8 @@ static void upload_pipelined_state_pointers(struct brw_context *brw ) brw->ctx.NewDriverState |= BRW_NEW_PSP; } -static void upload_psp_urb_cbs(struct brw_context *brw ) +static void +upload_psp_urb_cbs(struct brw_context *brw) { upload_pipelined_state_pointers(brw); brw_upload_urb_fence(brw); @@ -700,13 +703,11 @@ const struct brw_tracked_state brw_depthbuffer = { .emit = brw_emit_depthbuffer, }; - - -/*********************************************************************** +/** * Polygon stipple packet */ - -static void upload_polygon_stipple(struct brw_context *brw) +static void +upload_polygon_stipple(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; GLuint i; @@ -728,8 +729,7 @@ static void upload_polygon_stipple(struct brw_context *brw) if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) { for (i = 0; i < 32; i++) OUT_BATCH(ctx->PolygonStipple[31 - i]); /* invert */ - } - else { + } else { for (i = 0; i < 32; i++) OUT_BATCH(ctx->PolygonStipple[i]); } @@ -745,12 +745,11 @@ const struct brw_tracked_state brw_polygon_stipple = { .emit = upload_polygon_stipple }; - -/*********************************************************************** +/** * Polygon stipple offset packet */ - -static void upload_polygon_stipple_offset(struct brw_context *brw) +static void +upload_polygon_stipple_offset(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; @@ -785,10 +784,11 @@ const struct brw_tracked_state brw_polygon_stipple_offset = { .emit = upload_polygon_stipple_offset }; -/********************************************************************** +/** * AA Line parameters */ -static void upload_aa_line_parameters(struct brw_context *brw) +static void +upload_aa_line_parameters(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; @@ -815,11 +815,11 @@ const struct brw_tracked_state brw_aa_line_parameters = { .emit = upload_aa_line_parameters }; -/*********************************************************************** +/** * Line stipple packet */ - -static void upload_line_stipple(struct brw_context *brw) +static void +upload_line_stipple(struct brw_context *brw) { struct gl_context *ctx = &brw->ctx; GLfloat tmp; @@ -837,8 +837,7 @@ static void upload_line_stipple(struct brw_context *brw) tmp = 1.0f / ctx->Line.StippleFactor; tmpi = tmp * (1<<16); OUT_BATCH(tmpi << 15 | ctx->Line.StippleFactor); - } - else { + } else { /* in U1.13 */ tmp = 1.0f / ctx->Line.StippleFactor; tmpi = tmp * (1<<13); @@ -856,7 +855,6 @@ const struct brw_tracked_state brw_line_stipple = { .emit = upload_line_stipple }; - void brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline) { @@ -872,11 +870,9 @@ brw_emit_select_pipeline(struct brw_context *brw, enum brw_pipeline pipeline) ADVANCE_BATCH(); } - -/*********************************************************************** +/** * Misc invariant state packets */ - void brw_upload_invariant_state(struct brw_context *brw) { @@ -930,7 +926,8 @@ const struct brw_tracked_state brw_invariant_state = { * surface state objects, but not the surfaces that the surface state * objects point to. */ -static void upload_state_base_address( struct brw_context *brw ) +static void +upload_state_base_address(struct brw_context *brw) { /* FINISHME: According to section 3.6.1 "STATE_BASE_ADDRESS" of * vol1a of the G45 PRM, MI_FLUSH with the ISC invalidate should be -- 2.30.2