From 0766fdc93e48a2212751a1857585541037fb119f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 25 Sep 2022 13:48:23 +0100 Subject: [PATCH] add dz/sz assertion in is_bc mode --- src/openpower/sv/trans/svp64.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index 59611cc0..37fb7566 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1186,6 +1186,8 @@ class SVP64Asm: elif encmode == 'cti': svp64_rm.branch.CTR = 1 svp64_rm.branch.ctr.CTi = 1 + elif encmode in ['dz', 'zz']: + raise AssertionError("no encmode %s, use 'sz'" % encmode) else: raise AssertionError("unknown encmode %s" % encmode) else: -- 2.30.2