From 07781f0afef80c22389c4ac92dbce2cf47c9ab45 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Fri, 21 Feb 2020 18:06:18 +0200 Subject: [PATCH] iris: store workaround address This will allow to select a different address later, leaving the beginning of the buffer to some other use. Signed-off-by: Lionel Landwerlin Part-of: --- src/gallium/drivers/iris/iris_batch.h | 6 ------ src/gallium/drivers/iris/iris_blorp.c | 5 ++++- src/gallium/drivers/iris/iris_pipe_control.c | 3 ++- src/gallium/drivers/iris/iris_screen.c | 5 +++++ src/gallium/drivers/iris/iris_screen.h | 7 +++++++ src/gallium/drivers/iris/iris_state.c | 8 +++++--- 6 files changed, 23 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/iris/iris_batch.h b/src/gallium/drivers/iris/iris_batch.h index d8278279551..8323f45eff2 100644 --- a/src/gallium/drivers/iris/iris_batch.h +++ b/src/gallium/drivers/iris/iris_batch.h @@ -57,12 +57,6 @@ enum iris_batch_name { #define IRIS_BATCH_COUNT 2 -struct iris_address { - struct iris_bo *bo; - uint64_t offset; - bool write; -}; - struct iris_batch { struct iris_screen *screen; struct pipe_debug_callback *dbg; diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c index 028e7c592be..a295c6cacd3 100644 --- a/src/gallium/drivers/iris/iris_blorp.c +++ b/src/gallium/drivers/iris/iris_blorp.c @@ -228,7 +228,10 @@ blorp_get_workaround_address(struct blorp_batch *blorp_batch) { struct iris_batch *batch = blorp_batch->driver_batch; - return (struct blorp_address) { .buffer = batch->screen->workaround_bo }; + return (struct blorp_address) { + .buffer = batch->screen->workaround_address.bo, + .offset = batch->screen->workaround_address.offset, + }; } static void diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c index 59005894bbc..193bdef6c26 100644 --- a/src/gallium/drivers/iris/iris_pipe_control.c +++ b/src/gallium/drivers/iris/iris_pipe_control.c @@ -148,7 +148,8 @@ iris_emit_end_of_pipe_sync(struct iris_batch *batch, iris_emit_pipe_control_write(batch, reason, flags | PIPE_CONTROL_CS_STALL | PIPE_CONTROL_WRITE_IMMEDIATE, - batch->screen->workaround_bo, 0, 0); + batch->screen->workaround_address.bo, + batch->screen->workaround_address.offset, 0); } /** diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index cd5d9b72951..8f28fc3ab9e 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -718,6 +718,11 @@ iris_screen_create(int fd, const struct pipe_screen_config *config) if (!screen->workaround_bo) return NULL; + screen->workaround_address = (struct iris_address) { + .bo = screen->workaround_bo, + .offset = 0, + }; + brw_process_intel_debug_variable(); screen->driconf.dual_color_blend_by_location = diff --git a/src/gallium/drivers/iris/iris_screen.h b/src/gallium/drivers/iris/iris_screen.h index 9ee111c911a..1ce0550a6bf 100644 --- a/src/gallium/drivers/iris/iris_screen.h +++ b/src/gallium/drivers/iris/iris_screen.h @@ -136,6 +136,12 @@ struct iris_vtable { void (*lost_genx_state)(struct iris_context *ice, struct iris_batch *batch); }; +struct iris_address { + struct iris_bo *bo; + uint64_t offset; + bool write; +}; + struct iris_screen { struct pipe_screen base; @@ -190,6 +196,7 @@ struct iris_screen { * require scratch writes or reads from some unimportant memory. */ struct iris_bo *workaround_bo; + struct iris_address workaround_address; struct disk_cache *disk_cache; }; diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 136297fd197..fd44d7046e0 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -5224,7 +5224,7 @@ setup_constant_buffers(struct iris_context *ice, push_bos->buffers[n].length = range->length; push_bos->buffers[n].addr = res ? ro_bo(res->bo, range->start * 32 + cbuf->buffer_offset) - : ro_bo(batch->screen->workaround_bo, 0); + : batch->screen->workaround_address; n++; } @@ -5971,7 +5971,8 @@ iris_upload_dirty_render_state(struct iris_context *ice, */ iris_emit_pipe_control_write(batch, "WA for stencil state", PIPE_CONTROL_WRITE_IMMEDIATE, - batch->screen->workaround_bo, 0, 0); + batch->screen->workaround_address.bo, + batch->screen->workaround_address.offset, 0); } union isl_color_value clear_value = { .f32 = { 0, } }; @@ -6989,7 +6990,8 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, flags |= PIPE_CONTROL_WRITE_IMMEDIATE; post_sync_flags |= PIPE_CONTROL_WRITE_IMMEDIATE; non_lri_post_sync_flags |= PIPE_CONTROL_WRITE_IMMEDIATE; - bo = batch->screen->workaround_bo; + bo = batch->screen->workaround_address.bo; + offset = batch->screen->workaround_address.offset; } } -- 2.30.2