From 07cd5a97251767051011c3cf72b52804de065c9a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 3 Dec 2023 18:42:57 +0000 Subject: [PATCH] add WIP lrsc mdwn for stbcx --- openpower/isa/lrsc.txt | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 openpower/isa/lrsc.txt diff --git a/openpower/isa/lrsc.txt b/openpower/isa/lrsc.txt new file mode 100644 index 00000000..b3fdea94 --- /dev/null +++ b/openpower/isa/lrsc.txt @@ -0,0 +1,29 @@ +EA <- (RA|0) + (RB) +undefined_case <- 0 +store_performed <- 0 +if RESERVE then + if RESERVE_LENGTH = 1 & + RESERVE_ADDR = real_addr(EA) then + MEM(EA, 1) <- (RS)56:63 + undefined_case <- 0 + store_performed <- 1 + else + z <- 4096 # smallest implementation's real page size + if RESERVE_ADDR / z = real_addr(EA) / z then + undefined_case <- 1 + else + undefined_case <- 0 + store_performed <- 0 +else + undefined_case <- 0 + store_performed <- 0 +if undefined_case then + u1 <- undefined(0b1) + if u1 then + MEM(EA, 1) <- (RS)56:63 + u2 <- undefined(0b0) + CR0 <- 0b00 || u2 || XERSO +else + CR0 <- 0b00 || store_performed || XER[SO] +RESERVE  0 + -- 2.30.2