From 07dffce2135bae9314222623a6402d19516203e8 Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Sat, 4 Apr 2020 11:10:08 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen --- a3/cc67619640ae27d2dcf5637791979702d48258 | 70 +++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 a3/cc67619640ae27d2dcf5637791979702d48258 diff --git a/a3/cc67619640ae27d2dcf5637791979702d48258 b/a3/cc67619640ae27d2dcf5637791979702d48258 new file mode 100644 index 0000000..c91a56c --- /dev/null +++ b/a3/cc67619640ae27d2dcf5637791979702d48258 @@ -0,0 +1,70 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Sat, 04 Apr 2020 12:10:10 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jKggj-0006h3-PL; Sat, 04 Apr 2020 12:10:09 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) id 1jKggh-0006gw-Nw + for libre-riscv-dev@lists.libre-riscv.org; Sat, 04 Apr 2020 12:10:07 +0100 +From: bugzilla-daemon@libre-riscv.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Sat, 04 Apr 2020 11:10:08 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: whitequark@whitequark.org +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: http://bugs.libre-riscv.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNzYKCi0tLSBDb21t +ZW50ICMxMyBmcm9tIHdoaXRlcXVhcmtAd2hpdGVxdWFyay5vcmcgLS0tCihJbiByZXBseSB0byBM +dWtlIEtlbm5ldGggQ2Fzc29uIExlaWdodG9uIGZyb20gY29tbWVudCAjMTIpCj4gY291bGQgeW91 +IGxldCBtZSBrbm93IHdoYXQgYW1vdW50IHlvdSdkIGJlIGhhcHB5IHRvIHJlY2VpdmUgYXMgYSBk +b25hdGlvbgo+IGZyb20gTkxOZXQsIGZvciBpbmNsdWRpbmcgJHNyIGluIGN4eHJ0bD8KCkFzIGl0 +IHR1cm5zIG91dCwgdGhlcmUncyBhY3R1YWxseSBhbHJlYWR5IHN1cHBvcnQgZm9yIGAkZGZmc3Jg +IGxhdGNoIGluIGN4eHJ0bCwKd2hpY2ggaXMgd2hhdCB5b3UgbmVlZCBidXQgd2l0aCBhbiBleHRy +YSBjbG9jay4gU28gYCRzcmAgc3VwcG9ydCB3b3VsZCBiZSBhYm91dAp0ZW4gbGluZXMgb2YgY29k +ZSBJIGhhdmUgdG8gY29weSBhbmQgcGFzdGUgZnJvbSB0aGUgYCRkZmZzcmAgY2FzZS4KCi0tIApZ +b3UgYXJlIHJlY2VpdmluZyB0aGlzIG1haWwgYmVjYXVzZToKWW91IGFyZSBvbiB0aGUgQ0MgbGlz +dCBmb3IgdGhlIGJ1Zy4KX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f +X19fX18KbGlicmUtcmlzY3YtZGV2IG1haWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMu +bGlicmUtcmlzY3Yub3JnCmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0 +aW5mby9saWJyZS1yaXNjdi1kZXYK + -- 2.30.2