From 0844e4324e7a6a92d76ff781e61ab086f528881d Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 22 Oct 2018 07:29:03 +0000 Subject: [PATCH] i386: Enable AVX512 memory broadcast for INT logic Many AVX512 vector operations can broadcast from a scalar memory source. This patch enables memory broadcast for INT logic operations. gcc/ PR target/72782 * config/i386/sse.md (*3_bcst): New. gcc/testsuite/ PR target/72782 * gcc.target/i386/avx512f-and-di-zmm-1.c: New test. * gcc.target/i386/avx512f-and-si-zmm-1.c: Likewise. * gcc.target/i386/avx512f-and-si-zmm-2.c: Likewise. * gcc.target/i386/avx512f-and-si-zmm-3.c: Likewise. * gcc.target/i386/avx512f-and-si-zmm-4.c: Likewise. * gcc.target/i386/avx512f-and-si-zmm-5.c: Likewise. * gcc.target/i386/avx512f-and-si-zmm-6.c: Likewise. * gcc.target/i386/avx512f-or-di-zmm-1.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-1.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-2.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-3.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-4.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-5.c: Likewise. * gcc.target/i386/avx512f-or-si-zmm-6.c: Likewise. * gcc.target/i386/avx512f-xor-di-zmm-1.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-1.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-2.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-3.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-4.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-5.c: Likewise. * gcc.target/i386/avx512f-xor-si-zmm-6.c: Likewise. * gcc.target/i386/avx512vl-and-si-xmm-1.c: Likewise. * gcc.target/i386/avx512vl-and-si-ymm-1.c: Likewise. * gcc.target/i386/avx512vl-or-si-xmm-1.c: Likewise. * gcc.target/i386/avx512vl-or-si-ymm-1.c: Likewise. * gcc.target/i386/avx512vl-xor-si-xmm-1.c: Likewise. * gcc.target/i386/avx512vl-xor-si-ymm-1.c: Likewise. From-SVN: r265369 --- gcc/ChangeLog | 5 +++ gcc/config/i386/sse.md | 12 +++++++ gcc/testsuite/ChangeLog | 31 +++++++++++++++++++ .../gcc.target/i386/avx512f-and-di-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-2.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-3.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-4.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-5.c | 12 +++++++ .../gcc.target/i386/avx512f-and-si-zmm-6.c | 12 +++++++ .../gcc.target/i386/avx512f-or-di-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-2.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-3.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-4.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-5.c | 12 +++++++ .../gcc.target/i386/avx512f-or-si-zmm-6.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-di-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-1.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-2.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-3.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-4.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-5.c | 12 +++++++ .../gcc.target/i386/avx512f-xor-si-zmm-6.c | 12 +++++++ .../gcc.target/i386/avx512vl-and-si-xmm-1.c | 12 +++++++ .../gcc.target/i386/avx512vl-and-si-ymm-1.c | 12 +++++++ .../gcc.target/i386/avx512vl-or-si-xmm-1.c | 12 +++++++ .../gcc.target/i386/avx512vl-or-si-ymm-1.c | 12 +++++++ .../gcc.target/i386/avx512vl-xor-si-xmm-1.c | 12 +++++++ .../gcc.target/i386/avx512vl-xor-si-ymm-1.c | 12 +++++++ 30 files changed, 372 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-di-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-3.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-4.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-5.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-6.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-di-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-3.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-4.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-5.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-6.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-di-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-3.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-4.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-5.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-6.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-and-si-xmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-and-si-ymm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-or-si-xmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-or-si-ymm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-xor-si-xmm-1.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-xor-si-ymm-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 308da786ebb..9b735458d7c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-10-22 H.J. Lu + + PR target/72782 + * config/i386/sse.md (*3_bcst): New. + 2018-10-22 H.J. Lu PR target/72782 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index c831ae2d465..e991da96aee 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -12324,6 +12324,18 @@ ] (const_string "")))]) +(define_insn "*3_bcst" + [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v") + (any_logic:VI48_AVX512VL + (vec_duplicate:VI48_AVX512VL + (match_operand: 1 "memory_operand" "m")) + (match_operand:VI48_AVX512VL 2 "register_operand" "v")))] + "TARGET_AVX512F && " + "vp\t{%1, %2, %0|%0, %2, %1}" + [(set_attr "type" "sseiadd") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_insn "_testm3" [(set (match_operand: 0 "register_operand" "=Yk") (unspec: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 15e03fab46a..43b0ab56ec1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,34 @@ +2018-10-22 H.J. Lu + + PR target/72782 + * gcc.target/i386/avx512f-and-di-zmm-1.c: New test. + * gcc.target/i386/avx512f-and-si-zmm-1.c: Likewise. + * gcc.target/i386/avx512f-and-si-zmm-2.c: Likewise. + * gcc.target/i386/avx512f-and-si-zmm-3.c: Likewise. + * gcc.target/i386/avx512f-and-si-zmm-4.c: Likewise. + * gcc.target/i386/avx512f-and-si-zmm-5.c: Likewise. + * gcc.target/i386/avx512f-and-si-zmm-6.c: Likewise. + * gcc.target/i386/avx512f-or-di-zmm-1.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-1.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-2.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-3.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-4.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-5.c: Likewise. + * gcc.target/i386/avx512f-or-si-zmm-6.c: Likewise. + * gcc.target/i386/avx512f-xor-di-zmm-1.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-1.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-2.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-3.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-4.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-5.c: Likewise. + * gcc.target/i386/avx512f-xor-si-zmm-6.c: Likewise. + * gcc.target/i386/avx512vl-and-si-xmm-1.c: Likewise. + * gcc.target/i386/avx512vl-and-si-ymm-1.c: Likewise. + * gcc.target/i386/avx512vl-or-si-xmm-1.c: Likewise. + * gcc.target/i386/avx512vl-or-si-ymm-1.c: Likewise. + * gcc.target/i386/avx512vl-xor-si-xmm-1.c: Likewise. + * gcc.target/i386/avx512vl-xor-si-ymm-1.c: Likewise. + 2018-10-22 H.J. Lu PR target/72782 diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-di-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-and-di-zmm-1.c new file mode 100644 index 00000000000..e919b26c70b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-di-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpandq\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastq\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi64 +#define SCALAR long long + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-1.c new file mode 100644 index 00000000000..0e7d8544477 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-2.c new file mode 100644 index 00000000000..19596f65f77 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-2.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-3.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-3.c new file mode 100644 index 00000000000..a3de58a23d6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpandd\[^\n\]*%zmm\[0-9\]+" 1 } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-3.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-4.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-4.c new file mode 100644 index 00000000000..ce50edd375f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+%zmm\[0-9\]+, %zmm\[0-9\]+, %zmm0" 1 } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-4.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-5.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-5.c new file mode 100644 index 00000000000..d3fc8bac169 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-5.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-6.c b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-6.c new file mode 100644 index 00000000000..dfc3f91bf47 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-and-si-zmm-6.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op and +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-6.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-di-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-or-di-zmm-1.c new file mode 100644 index 00000000000..7bbd971c0e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-di-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vporq\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastq\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi64 +#define SCALAR long long + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-1.c new file mode 100644 index 00000000000..6e5583d0ae6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-2.c new file mode 100644 index 00000000000..c631b40f985 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-2.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-3.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-3.c new file mode 100644 index 00000000000..3d669e3c7c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpord\[^\n\]*%zmm\[0-9\]+" 1 } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-3.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-4.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-4.c new file mode 100644 index 00000000000..78c11ae3a69 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+%zmm\[0-9\]+, %zmm\[0-9\]+, %zmm0" 1 } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-4.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-5.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-5.c new file mode 100644 index 00000000000..2002688e075 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-5.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-6.c b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-6.c new file mode 100644 index 00000000000..031e193eb9e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-or-si-zmm-6.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-6.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-di-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-di-zmm-1.c new file mode 100644 index 00000000000..6ea551fb603 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-di-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpxorq\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastq\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi64 +#define SCALAR long long + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-1.c new file mode 100644 index 00000000000..d0cb66c1179 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-2.c new file mode 100644 index 00000000000..5d241e43264 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-2.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-3.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-3.c new file mode 100644 index 00000000000..50289701bcc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpxord\[^\n\]*%zmm\[0-9\]+" 1 } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-3.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-4.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-4.c new file mode 100644 index 00000000000..55f0e1b7cfc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+%zmm\[0-9\]+, %zmm\[0-9\]+, %zmm0" 1 } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-4.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-5.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-5.c new file mode 100644 index 00000000000..efd62cbb8d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-5.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-6.c b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-6.c new file mode 100644 index 00000000000..cc7a44ba53d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-xor-si-zmm-6.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512f -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */ + +#define type __m512i +#define vec 512 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-6.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-and-si-xmm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-and-si-xmm-1.c new file mode 100644 index 00000000000..da295152fa6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-and-si-xmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %xmm\[0-9\]+, %xmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%xmm\[0-9\]+" } } */ + +#include + +__m128i +foo (__m128i x, int *f) +{ + return (__m128i) ((__v4su) x & (__v4su) _mm_set1_epi32 (*f)); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-and-si-ymm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-and-si-ymm-1.c new file mode 100644 index 00000000000..f2ba6c6eb86 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-and-si-ymm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpandd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %ymm\[0-9\]+, %ymm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%ymm\[0-9\]+" } } */ + +#include + +__m256i +foo (__m256i x, int *f) +{ + return (__m256i) ((__v8su) x & (__v8su) _mm256_set1_epi32 (*f)); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-or-si-xmm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-or-si-xmm-1.c new file mode 100644 index 00000000000..66ab5504ce7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-or-si-xmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %xmm\[0-9\]+, %xmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%xmm\[0-9\]+" } } */ + +#define type __m128i +#define vec +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-or-si-ymm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-or-si-ymm-1.c new file mode 100644 index 00000000000..3a87c34439f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-or-si-ymm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %ymm\[0-9\]+, %ymm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%ymm\[0-9\]+" } } */ + +#define type __m256i +#define vec 256 +#define op or +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-xmm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-xmm-1.c new file mode 100644 index 00000000000..8197568ccf7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-xmm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %xmm\[0-9\]+, %xmm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%xmm\[0-9\]+" } } */ + +#define type __m128i +#define vec +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-ymm-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-ymm-1.c new file mode 100644 index 00000000000..06933fe60c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-xor-si-ymm-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx512vl -O2" } */ +/* { dg-final { scan-assembler-times "vpxord\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %ymm\[0-9\]+, %ymm0" 1 } } */ +/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%ymm\[0-9\]+" } } */ + +#define type __m256i +#define vec 256 +#define op xor +#define suffix epi32 +#define SCALAR int + +#include "avx512-binop-1.h" -- 2.30.2