From 089a3a64a70e9aaf7a44e0e6c2f86fb1a277d9b1 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 3 Oct 2023 11:22:54 +0100
Subject: [PATCH] Added English Language description for lfsu instruction

---
 openpower/isa/fpload.mdwn | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/openpower/isa/fpload.mdwn b/openpower/isa/fpload.mdwn
index 9e16cc9e..e4d96960 100644
--- a/openpower/isa/fpload.mdwn
+++ b/openpower/isa/fpload.mdwn
@@ -61,6 +61,19 @@ Pseudo-code:
     FRT <- DOUBLE(MEM(EA, 4))
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum (RA)+D.
+
+    The word in storage addressed by EA is interpreted as
+    a floating-point single-precision operand. This word is
+    converted to floating-point double format (see
+    page 138) and placed into register FRT.
+
+    EA is placed into register RA.
+
+    If RA=0, the instruction form is invalid.
+
 Special Registers Altered:
 
     None
-- 
2.30.2