From 08e251cb85f45f882d1c5a807183dff9946e9968 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 25 Jul 2018 06:47:48 +0100 Subject: [PATCH] add fastbus system, which stops peripherals from being added to slow --- src/bsv/peripheral_gen/base.py | 43 ++++++++++++++++++++++++++++++-- src/bsv/peripheral_gen/jtag.py | 4 --- src/bsv/peripheral_gen/rgbttl.py | 5 ---- src/bsv/pinmux_generator.py | 2 +- src/ifacebase.py | 2 ++ src/spec/i_class.py | 2 +- 6 files changed, 45 insertions(+), 13 deletions(-) diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py index 6de3932..fef5dbe 100644 --- a/src/bsv/peripheral_gen/base.py +++ b/src/bsv/peripheral_gen/base.py @@ -5,6 +5,10 @@ class PBase(object): def __init__(self, name): self.name = name + def extifdecl(self, name, count): + sname = self.get_iname(count) + return " interface PeripheralSide%s %s;" % (name.upper(), sname) + def slowifdeclmux(self, name, count): return '' @@ -234,7 +238,8 @@ class PeripheralIface(object): self.slow = slow(ifacename) self.slow.peripheral = self for fname in ['slowimport', - 'extifinstance', 'slowifdecl', 'slowifdeclmux', + 'extifinstance', 'extifdecl', + 'slowifdecl', 'slowifdeclmux', 'mkslow_peripheral', 'mk_plic', 'mk_ext_ifacedef', 'mk_connection', 'mk_cellconn', 'mk_pincon']: fn = CallFn(self, fname) @@ -279,9 +284,21 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + iname = self.data[name].iname().format(i) + if not self.is_on_fastbus(name, i): + continue ret.append(self.data[name].extifinstance(name, i)) return '\n'.join(list(filter(None, ret))) + def extifdecl(self, *args): + ret = [] + for (name, count) in self.ifacecount: + for i in range(count): + if not self.is_on_fastbus(name, i): + continue + ret.append(self.data[name].extifdecl(name, i)) + return '\n'.join(list(filter(None, ret))) + def slowifdeclmux(self, *args): ret = [] for (name, count) in self.ifacecount: @@ -293,6 +310,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue ret.append(self.data[name].slowifdecl().format(i, name)) return '\n'.join(list(filter(None, ret))) @@ -301,6 +320,8 @@ class PeripheralInterfaces(object): start = 0x00011100 # start of AXI peripherals address for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue x = self.data[name].axi_reg_def(start, i) #print ("ifc", name, x) (rdef, offs) = x @@ -313,6 +334,8 @@ class PeripheralInterfaces(object): start = 0 for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue (rdef, offs) = self.data[name].axi_slave_idx(start, i) #print ("ifc", name, rdef, offs) ret.append(rdef) @@ -325,6 +348,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue ret.append(self.data[name].axi_addr_map(i)) return '\n'.join(list(filter(None, ret))) @@ -332,6 +357,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue print "mkslow", name, count x = self.data[name].mkslow_peripheral() print name, count, x @@ -343,7 +370,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): - print "mk_conn", name, i + if self.is_on_fastbus(name, i): + continue txt = self.data[name].mk_connection(i) if name == 'gpioa': print "txt", txt @@ -356,6 +384,8 @@ class PeripheralInterfaces(object): cellcount = 0 for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue res = self.data[name].mk_cellconn(cellcount, name, i) if not res: continue @@ -368,6 +398,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue txt = self.data[name].mk_pincon(name, i) ret.append(txt) return '\n'.join(list(filter(None, ret))) @@ -376,6 +408,8 @@ class PeripheralInterfaces(object): ret = [] for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue txt = self.data[name].mk_ext_ifacedef(name, i) ret.append(txt) return '\n'.join(list(filter(None, ret))) @@ -385,6 +419,8 @@ class PeripheralInterfaces(object): irq_offs = 8 # XXX: DMA scovers 0-7? for (name, count) in self.ifacecount: for i in range(count): + if self.is_on_fastbus(name, i): + continue res = self.data[name].mk_plic(i, irq_offs) if not res: continue @@ -396,6 +432,9 @@ class PeripheralInterfaces(object): def mk_sloirqsdef(self): return " `define NUM_SLOW_IRQS {0}".format(self.num_slow_irqs) + def is_on_fastbus(self, name, i): + iname = self.data[name].iname().format(i) + return iname in self.fastbus class PFactory(object): def getcls(self, name): diff --git a/src/bsv/peripheral_gen/jtag.py b/src/bsv/peripheral_gen/jtag.py index 589ecf8..6aca84e 100644 --- a/src/bsv/peripheral_gen/jtag.py +++ b/src/bsv/peripheral_gen/jtag.py @@ -12,7 +12,3 @@ class jtag(PBase): def axi_addr_map(self, name, ifacenum): return '' - def slowifdeclmux(self, name, count): - sname = self.get_iname(count) - return " interface PeripheralSideJTAG %s;" % sname - diff --git a/src/bsv/peripheral_gen/rgbttl.py b/src/bsv/peripheral_gen/rgbttl.py index 3d3f6b5..e875beb 100644 --- a/src/bsv/peripheral_gen/rgbttl.py +++ b/src/bsv/peripheral_gen/rgbttl.py @@ -33,8 +33,3 @@ class rgbttl(PBase): for ptype in ['data_out']: ret.append(template.format(ps, ptype, n)) return '\n'.join(ret) - - def slowifdeclmux(self, name, count): - sname = self.get_iname(count) - return " interface PeripheralSideLCD %s;" % sname - diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index 2abce7c..7a175ed 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -102,7 +102,7 @@ def write_slow(slow, slowt, p, ifaces, iocells): with open(slowt) as bsv_file: slowt = bsv_file.read() imports = ifaces.slowimport() - ifdecl = ifaces.slowifdeclmux() + ifdecl = ifaces.slowifdeclmux() + '\n' + ifaces.extifdecl() regdef = ifaces.axi_reg_def() slavedecl = ifaces.axi_slave_idx() fnaddrmap = ifaces.axi_addr_map() diff --git a/src/ifacebase.py b/src/ifacebase.py index e5e7e97..81e4e9d 100644 --- a/src/ifacebase.py +++ b/src/ifacebase.py @@ -12,6 +12,7 @@ class InterfacesBase(UserDict): def __init__(self, ifacekls, pth=None, ifaceklsdict=None): self.pth = pth + self.fastbus = [] self.ifacecount = [] if ifaceklsdict is None: ifaceklsdict = {} @@ -27,6 +28,7 @@ class InterfacesBase(UserDict): ln = ln.split("\t") name = ln[0] # will have uart count = int(ln[1]) # will have count of uart + self.fastbus += ln[2:] # spec looks like this: """ [{'name': 'sda', 'outen': True}, diff --git a/src/spec/i_class.py b/src/spec/i_class.py index daf064a..5d73b26 100644 --- a/src/spec/i_class.py +++ b/src/spec/i_class.py @@ -58,7 +58,7 @@ def pinspec(): } ps = PinSpec(pinbanks, fixedpins, function_names, - ['lcd0', 'jtag0']) + ['lcd', 'jtag']) # Bank A, 0-27 ps.gpio("", ('A', 0), 0, 0, 28) -- 2.30.2