From 093dd10433a033e3dc19c6b6fd85a39a1e3a3e2b Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 29 Sep 2022 23:55:10 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index a73c0c8ce..cd0d0425b 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -73,7 +73,9 @@ The inspiration for Simple-V came from the fact that on examination of every Vector ISA pseudocode encountered the Vector operations were expressed as a for-loop on a Scalar element operation, and then both a Scalar **and** a Vector instruction was added. -With Zero-Overhead Looping *already* being mainstream in DSPs for over three +With +[Zero-Overhead Looping](https://en.m.wikipedia.org/wiki/Zero-overhead_looping) +*already* being common for over four decades it felt natural to separate the looping at both the ISA and the Hardware Level and thus provide only Scalar instructions (instantly halving the number -- 2.30.2